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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Petz who wrote (227218)	3/2/2007 5:31:19 AM
From: DDB_WO	Respond to of 275872

Petz - it was Allen, who mentioned the 3.6X number (and that Barcelona is 80% faster per clock compared to Opteron in HPC - but QC would run at lower clocks) news.com.com And some other numbers: Despite the big gain in performance over the previous generation, Barcelona will have the same power consumption levels, with 95- and 68-watt designs. So even though the wattage hasn't gone down, the increase in processing power turns into a 60 percent-per-watt performance gain, according to Randy Allen, vice president of the server and workstation division at AMD. So at same TDP and as a quad core chip, Barcelona would only deliver a ~60% gain compared to current DC Opterons (on average?).

To: Petz who wrote (227218)	3/2/2007 7:31:54 AM
From: DDB_WO	Respond to of 275872

K8L=Brisbane and 3.2X FP improvement mentioned here: syndrome-oc.net BTW, somehow I don't like all those video interviews coming up. Although it's easy to follow the talkers even with Italian or French accent, it's a much higher information throughput for me to read, what they say ;)

To: Petz who wrote (227218)	3/2/2007 11:00:31 AM
From: Ali Chen	Read Replies (4) \| Respond to of 275872

"Nonsense, Amato did not ever say 3.60x, he said 3.2x" Nonsense???. What the hell a difference between 3.6 or 3.2 can make if the actual performance will not reach even 1/10th of this? You are obviously completely blind to any argument. Don't you see that the fact of different quotations from different AMD people itself is an indicator that they are speculating wildly, have no real data and no touch with reality, just pushing a corporate wish in an effort to maintain face. "And, by the way, you are forgetting that better prefetch can significantly improve floating point performance." I am forgetting nothing. It is you who is not realizing that only a very special algorithm can keep busy all 8 FP units all time, and this algorithm is definitely not all over the SPEC benchmarks. Then you will run into BW issues. You also apparently didn't get my remark that full utilisation of the FP units requires special compiler, which is unlikely to be near soon given current AMD financial state and limited resources. In the mean time don't make a mistake thinking that Intel would miss an opportunity to support their new SSE4 (or whatever) in current version of their home-grown compiler, and will arrive with even better public image about their performance. - Ali