To: Sarmad Y. Hermiz who wrote (228501 ) 3/20/2007 2:26:41 PM From: pgerassi Read Replies (3) | Respond to of 275872 Dear Sarmad: SOI has a few advantages that Intel pooh poohs. One is that it has lower parasitic and substrate leakage. Since for the last few process nodes, leakage is a significant contributer to overall thermal output. That means SOI uses less power on average than bulk. Alternatively, SOI allows for more dynamic power for the same amount of generated thermal power. That means higher frequencies. Or you can have more transistors at the same clock. So you can have either a lower power at the same clock, a higher clock at the same power or more cores or functionality at the same clock and power. So far SOI looks to be about the equivalent of one process generation. While it may look to you that Intel is ahead a year ahead at a process node, this is going to shrink quickly because each subsequent process node is going to take exponentially longer to get to. 32nm is going to take 4 years rather than the 2 years to go from 65nm to 45nm. 22nm will take 8 years to get to. During that time, Intel may have one more year of experience at the same node, but AMD will be on the same node. So AMD will be either 20% higher on clock at the same power, have half the power or twice as many cores at the same clock. GIven that either is about a doubling in value or ASP, Intel will be in a world of hurt unless they add it. The second advantage is that it allows a floating body to store a charge for a short perod of time. That means ZRAM which is a version of DRAM can be densely made. This would turn L3 cache on its ear between AMD and Intel. Intel will have to use much larger chip to have the same amount of cache. This will add additional latency due to the sheer size, significantly increase idle power and lower yields. Intel will have to go to ODMC and away from FSBs to P2P links like AMD did. The problem with that is that it will take INtel at least a year to implement and many more years to work the bugs out. If AMD has a MS or greater than 30%, it is likely that the industry will force Intel to use HTT as it is already debugged and available from many sources. Else they will ignore Genesco like they did Itanium and RDRAM and AMD's market share would skyrocket beyond 50%. BTW The oxide layer forming SOI is very thin and doesn't affect thermal resistance much at all. In fact the voids that naturally occur between the IHS and the die of a typical CPU package affect the thermal resistance far more even filled with thermal compound. Between the added cost per wafer and the additional required design work of SOI adds very little to the cost of a packaged CPU. The largest cost was the longer time to market. That is why Intel keeps claiming it adds little wrt its cost. Problem is that the rewards of getting 50-100% more ASP makes it far more effective to the bottom line. To see how it would help INtel, look to how Intel would have competed to AMD if it was at 90nm at the same time. Would a 300mm2 800MHz FSB 2.4GHz Conroe 4MB L2 be effective against a 193mm2 3GHz A64 X2 6000+? Would a 200mm2 667MHz FSB 2GHz Conroe 2MB L2 be effective against a 126mm2 2.6GHz A64 X2 5000+? In both cases, Intel would be quite behind in performance. To the tune of at least one bin or 50% ASPs. Halve Intel's CPU revenues and where would Intel be? Having large losses every quarter and well below 50% MS with talk of being bought out by someone. That is what its facing at 45nm having to spend 2009, 2010 and 2011 at the same process node as AMD. Now you see why Intel must destroy AMD before it gets to 45nm in 2008. And when small GPUs are integrated in during 2009, it will fall behind again in performance, performance per watt and performance per dollar (GP-GPU benchmarks will be added to CPU comparisons with no external GPUs allowed). It would be much worse, if they haven't caught up with just CPU only benchmarks. Pete