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To: neolib who wrote (228921)3/25/2007 8:50:18 PM
From: dougSF30Read Replies (1) | Respond to of 275872
 
I wish one of the IC analysis shops would try to compare Intel's & AMD's 65nm processes and comment on the issue.

I think that one probably has, but it is not a public report, and this (or someone who has seen it) may be where Elmer is getting his information that AMD's current 65nm process has no strain.

semiconductor.com

Note that the date of that release is the same as Elmer's post on IHub. Their reports are very expensive, and you sign a contract with confidentiality clauses, so that would explain being cagey about the source.



To: neolib who wrote (228921)3/25/2007 9:31:53 PM
From: pgerassiRespond to of 275872
 
Dear Neolib:

These links have much of what you state:

ewh.ieee.org
vlsicad.ucsd.edu

The last goes over many issues seen even at 2001. You might need to define what the MPU M1 half pitch means wrt the current process definitions talked here. The 2006 update was written less than 2 weeks ago (3/12/2007), so it is current.

Pete