To: wbmw who wrote (237012 ) 7/24/2007 7:38:25 PM From: TGPTNDR Read Replies (1) | Respond to of 275872 WB, Re: Maybe you should reread what I wrote. I described the Intel process of entering C1E, and the AMD process of entering C1E, and AMD has more steps involved in what they need to do.> The topic was RETURNING from C1E. Here's your italicized statement from Pete.Re: And AMD can return from its C1E faster than Intel can from their C1E as AMD just has to start the HT link and come out of halt state And Here's what you said. All Intel has to do is receive a HALT or MWAIT instruction from the OS in one of the cores in order to go into C1 state. C1E occurs when both cores are halted, and SpeedStep takes both cores to the minimum voltage and frequency before stopping the clocks. AMD cores work in the same way. If they want to get any benefit from C1 state, they will take time to transition to the min P-state, and then disable the HTT links, put the memory in self-refresh mode, and tri-state the DDR pins in order to go into C1E. You don't think all of this happens in a shorter amount of time, do you...? LOL. Now if you want to argue that the INTC chips can go into sleep faster than AMD chips I doubt Pete would argue. I wouldn't since I don't care how fast my CPU goes to "Sleep". But you should try to stay on subject while blathering... Re: but not quite as funny as you standing up for him when he is the one who is not honoring the burden of proof. On the contrary. I'm not standing up for Pete. It's you I'm pointing at. Re: By the way, several people have already corrected him that the right term is "Griffin" instead of "Griffith".>Message 23729365 Uncle. I've got to be up in around 6 hours. I'll try to read and understand your links tomorrow night. -tgp