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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: Petz who wrote (238307)	8/7/2007 2:57:38 PM
From: dougSF30	Read Replies (1) \| Respond to of 275872

"SSE4a" is not a subset, officially, just AMD being deliberately confusing. 2 or 3 of the 4 may have similar instructions in SSE4, but they could easily have arrived at them independently. SSE4A: EXTRQ INSERTQ MOVNTSD MOVNTSS SSE4: MPSADBW PHMINPOSUW PMULLD PMULDQ DPPS DPPD BLENDPS BLENDPD BLENDVPS BLENDVPD PBLENDVB PBLENDW PMINSB PMAXSB PMINUW PMAXUW PMINUD PMAXUD PMINSD PMAXSD ROUNDPS ROUNDSS ROUNDPD ROUNDSD INSERTPS PINSRB PINSRD PINSRQ EXTRACTPS PEXTRB PEXTRW PEXTRD PEXTRQ PMOVSXBW PMOVZXBW PMOVSXBD PMOVZXBD PMOVSXBQ PMOVZXBQ PMOVSXWD PMOVZXWD PMOVSXWQ PMOVZXWQ PMOVSXDQ PMOVZXDQ PTEST PCMPEQQ PACKUSDW MOVNTDQA

To: Petz who wrote (238307)	8/7/2007 2:58:27 PM
From: graphicsguru	Respond to of 275872

I wonder if AMD had to pay Intel to use the SSE4a instructions I'm pretty sure AMD can use any x86 instructions they want under the AMD/Intel cross license agreement (and vice-versa) without any change in the royalty payments. IIRC, it's usually about a year before AMD clones a new SSEx, so the immediate availability of a subset is somewhat unusual. Yes, this is unusual, but it's probably because enough details of at least some of the instructions were available at an early enough point in the Barcelona design for them to be included. It's a whole lot easier to add new instructions when you're building a new core than to tack them on to an existing one.