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To: dougSF30 who wrote (238315)8/7/2007 8:19:20 PM
From: PetzRead Replies (1) | Respond to of 275872
 
I have not been corrected. Look what adding cache redundancy did already

Redundant rows were built into the Pcache; through
laser repair after wafer probe, faulty rows could be replaced.
Negative binomial statistics [5] was used to determine
the impact of cache redundancy on the chip yield.
Without redundancy, the average fault density was estimated
to be four times higher in the Pcache than the rest
of the chip. It was shown that the nonrepairable fault density
in the Pcache decreased to 1.3 times that of the rest
of the chip when one redundant row was built for every
16 rows, and to 0.5 times that of the rest of the chip when
one row per 8 rows was used.
The latter option was selected,
and the maximum impact of the Pcache on overall
yield is estimated at about 3 % .
ieeexplore.ieee.org

This was a 100 MHz VAX microprocessor circa 1992. From page 2, the cache looks to be 20% of the chip area.

You might also want to look at an old Intel Technology Journal disclosure about Pentium Pro's redundant L2 cache, the I5, which was a separate chip.

The Production Results
Raster and replacement data indicated that 85% of all
die that failed the BIST screen could use redundancy.
After the first month in production, an average increase
in yield of 35% was evident.


Recognize that both of the above are very early examples of cache redundancy.

Petz