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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: wbmw who wrote (238857)	8/15/2007 6:36:57 PM
From: combjelly	Read Replies (1) \| Respond to of 275872

"Real engineers know that this theory of yours is full of manure." Yawn. It doesn't have to have the exact specs, as you should know if you are a real engineer. The L3 is decoupled from the core via the crossbar. It just has to be able to communicate across the crossbar, just like the other devices. The core doesn't have to know anything about the internals of the L3. Or even if the L3 is in the system at all. Now, I know you want to pretend it is different, but, it isn't. This is just another SOC problem. Which is why this approach is a smart one by AMD. Stop waving your hands and spouting buzz words and insults. Try using real arguments and stop being intellectually dishonest.

To: wbmw who wrote (238857)	8/15/2007 7:02:15 PM
From: Joe NYC	Read Replies (1) \| Respond to of 275872

wbmw, I'm not pointing out anything more than the obvious. You think that AMD can design an L3 block to the exact specifications of the Shanghai cache block L3 is located on the side of the die. It does not have to fit within any block. It is expanadable. Joe