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Technology Stocks : Advanced Micro vs Intel (AMD / INTC) -- Ignore unavailable to you. Want to Upgrade?

To: smooth2o who wrote (2172)	8/30/2007 1:34:03 PM
From: Elmer Phud	Read Replies (1) \| Respond to of 2596

smooth but Xeon is a lot faster... And it's available, outperforms anything AMD has shipped and we know Intel can produce it in high volume. We have ample benchmarks and a roadmap which we can have confidence in. Customers know that. Barcelona is still unknown as to performance, stability, availability and potential ramp. AMD is secretive, evasive, misleading, unreliable and lacking in credibility. Customers know that too. No reliable benchmarks exist and to my knowledge there is no credible report of customers having stable fully functional samples. For people to be joyous over confusing and ambiguous flake rumors from tabloid websites which include the equivalent of "the dog ate my proof" is rather pathetic in my opinion. We have no proof but all the available indicators say Barcelona is a real disappointment compared to the hype. I could be wrong but I'll go with logic over hysteria.

To: smooth2o who wrote (2172)	8/30/2007 1:44:00 PM
From: dougSF30	Respond to of 2596

As I told mas, he forgot about Seaburg again. Coming in Q4, this will provide a nice scaling boost, even to existing 65nm Xeons. Here's an overview of the reasons: techreport.com A question of chipsets Xeon 5300 processors should have no problems plugging into motherboards based on Intel's current Bensley platform. Bensley, of course, features dual front-side busses (one per CPU) at speeds of 1,066 or 1,333MHz, and supports fully buffered DIMMs (FB-DIMMs). We covered the Bensley platform when Intel rolled out the first "Woodcrest" dual-core Xeon processors, so it's nothing new. However, quad-core Clovertown CPUs will also work with Intel's upcoming Stoakley platform, which is due to debut in the first quarter of next year. The Stoakley platform is based on a 90-nano shrink of the Bensley architecture. Bensley's dual 1,066/1,333MHz front side busses return, this time with support for upcoming 45-nano Penryn chips. Stoakley also features plenty of PCI Express, with 44 lanes of PCIe joined by a pair of second-generation PCIe x16 links. Generation one PCIe links can be used to hook into a variety of peripheral chips to provide Serial ATA RAID, Gigabit Ethernet, and PCI-X connectivity. Seaburg is the codename for Stoakley's Memory Controller Hub (MCH), which features four channels of FB-DIMMs at 533 or 667MHz. Up to 128GB of memory is supported—double that of Bensley's Blackford MCH. Seaburg also offers an enhanced memory controller that Intel says improves sustained throughput by 25% and a larger, smarter snoop filter optimized for quad-core chips. The snoop filter stores coherency information on all of the cache lines mapped to system memory. The Blackford MCH's snoop filter isn't really optimized for quad-core designs; affinity groups are tied to each front-side bus, but quad-core CPUs add additional agents to those busses. With Seaburg, Intel has designed a snoop filter with four affinity groups—one for each last level cache on the front-side bus. Seaburg's snoop filter also features a new eviction algorithm, and its size has been increased to ensure complete coverage for future quad core-chips that Intel says will feature larger caches. Technically, the Stoakley platform is only a part of Intel's workstation chipset roadmap. However, system builders are free to use the chipset in servers, if they wish.