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To: graphicsguru who wrote (241458)9/29/2007 1:31:40 PM
From: chipguyRead Replies (2) | Respond to of 275872
 
Exactly what will be Itanium's market once MP x86 CSI parts come
into the world? Itanium's ability to work in large SMP configurations
will then be shared with x86.


I think you are quite mistaken in thinking that after CSI is
implemented in both Xeon and IPF processors that they
will be usable interchangeable and otherwise identical
except for the instruction set, i.e. pop one in a socket or
the other.

IPF and Xeon processors will be still be designed with
distinct trade-offs between RAS and scalability vs cost
and ease of implementation. Even CSI itself will have
feature subsets and form factors that would differ for
different sizes and classes of machines. Even with an
identical CSI pinout an IPF processor designed to scale
to 512 socket systems will dedicate much more mm2
of silicon to internal functionality for routing, buffering,
RAS, and ability to track virtual channels compared to
Xeon processors designed for low cost and optimized
for four socket systems.

Someone asked the chief Intel architect at the June IPF
roadmap presentation/press conference whether there
will be common Xeon and IPF motherboards based on
CSI. He replied that is possible to design motherboards
that could accept both Xeon and IPF processors but
OEMs were unlikely to do so. If the board implemented
all performance, RAS, and power delivery capabilities
to use IPF processors to their full advantage then it
would be too expensive and overkill to use with Xeons
compared to a mainstream Xeon board. If it was cost
oriented and targeted Xeon CSI mainstream capability
then plugging IPF chips into it would deliver much lower
performance and functionality than a full featured IPF
motherboard. IMO this is similar to the dynamics in play
when attempts were made to create common Alpha
and K7 mother boards in the late 1990s. It was a failure
despite the two processor families nominally sharing
the same interface. DEC's high performance Tsunami
chipset was overkill and too expensive for K7 while
AMD and third party K7 chipsets left way too much
Alpha performance on the table.

The purpose of CSI isn't to unify IPF and Xeon systems
and motherboards. It is to share silicon IP and chipset
development costs between IPF and Xeon within Intel
and OEMs. IPF processors will still ship mainly in systems
optimized for performance and scalability while Xeon
processors will still ship mainly in systems optimized
for low cost and power.