SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: chipguy who wrote (241492)9/29/2007 8:56:32 PM
From: Saturn VRead Replies (2) | Respond to of 275872
 
IA-64 vs 86-64 scalability

I still do not see a clear cut explanation for the greater scalability of IA-64. The large transistor budget used by the Out of Order Execution Engine was used as the justification for EPIC almost 15 years ago. In practice EPIC never delivered on its promised performance.It occurred because either the memory latency issue became the performance bottle neck and the execution resources were a non-issue,or the large transistor budgets of Itanium forced it to be on mature silicon processes technology.

By your implication the OOO is still a millstone around the neck of x86,and is the power hog,then we can put more Itaniums cores on a board with a limited power budget. Maybe. Does that mean that you can put more Itanium cores on a chip than x86-64 cores on a chip?

I still feel than four Xeon Sockets on a board is market segmentation issue, and leaves Intel vulnerable. It should be relatively easy to design a Xeon with more CSI links to allow boards with an extremely large number of Xeons.