SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : Spansion Inc. -- Ignore unavailable to you. Want to Upgrade?


To: Rink who wrote (2959)1/7/2008 4:50:48 PM
From: BUGGI-WO  Read Replies (1) | Respond to of 4590
 
@Rink
Thanks for all your well done posts. I made some recs.
Curious, why others don't2 do this.

BUGGI



To: Rink who wrote (2959)1/9/2008 10:41:24 AM
From: Pam  Respond to of 4590
 
From your article: Toshiba's 4b/c NAND adds 15% die size due to additional ECC, and possibly sensing technology (3b/c adds unknown amount of die size; could it possibly be that ECC circuitry for 4b/c was implemented with 3b/c already? -- alternatively I remembered the 15% expansion due to ECC for 4b/c and mixed it up with 3b/c...). Write are speeds down to 1Mb/s for 4b/c although this could possibly improve (write speeds of 3b/c??).

No details have been provided for 3 b/c. Toshiba/Sandisk's 4 b/c is still work in progress. I am sure the Write speeds will improve and the memory maybe useful for replacing 80GB and beyond HDD based iPods and other PMPs.

I'm still seeing the transition slowing bit by bit (maybe even after 43nm already if above 30nm generation turns out to be a bit higher than 30nm like e.g. ~35nm) and costs per mm2 increasing exponentially too. Not betting on that but:
- With 56nm they added immersion
- With 43nm high-k
- With 3xnm better high-k + FUSI + double patterning.
Granted, 43nm to 30nm (and a bit?) would be a full node, while from 56nm to 43nm isn't, but still it's a lot of process technology to add for 3xnm. 3xnm doesn't come cheap.


Is it important that each transition be a full node?
These days the key to success is who is first to market with higher density chips at lower cost per bit! Toshiba/Sandisk have been doing transitions that give them an die size efficiency of 40-50% with every transition. From 43nm, I would expect them to do 32nm, but they could do something different if they think the yields could be kept high.

Transitions are going to slow down, industry knows that and they have been guiding accordingly last couple of years but so far the pace of node transitions over the last few years has been a lot faster than most people in the industry had expected a few years ago! The bigger question in my mind is if there is another NVM technology out there that can replace NAND in 5 years time? I don't see anything yet that can provide solid state storage at a cost lower than what NAND (and its variations) could provide at in 5 years!