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To: Elmer Phud who wrote (248644)3/12/2008 3:27:20 AM
From: mas_Read Replies (1) | Respond to of 275872
 
Nothing has been proven except perhaps the die size of a Celeron 200. It's almost certainly a fused dual-core Core 2 of the smallest 1MB kind which could quite easily fit into that die size. I specifically asked for the die shot/layout and I'm still waiting, until then you are all just blowing smoke.



To: Elmer Phud who wrote (248644)3/12/2008 9:18:01 AM
From: chipguyRead Replies (1) | Respond to of 275872
 
Why would Intel develop 3 different versions of C2D if there were so many C2D defects available to be fused as lower grade products?

Considering that tens of millions of each of two smaller
devices have to be produced just to pay for the NRE out
of die cost savings the answer to your question is even
more obvious to all intelligent open minded people.



To: Elmer Phud who wrote (248644)3/12/2008 10:52:22 AM
From: GlooRead Replies (1) | Respond to of 275872
 
Do you think the people you are arguing with even comprehend or accept that there are 3 different versions of C2D?

Why would Intel develop 3 different versions of C2D if there were so many C2D defects available to be fused as lower grade products?