Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?

To: dougSF30 who wrote (252828)	6/5/2008 1:32:46 PM
From: mas_	Read Replies (1) \| Respond to of 275872

You can't BS Physics although you are doing your best to try. Nehalem takes 4 cycles for its L1 as opposed to 3 for Penryn. It takes 39 cycles as opposed to 15 for cache above 256KB. These are indisputable facts and can't be handwaved away no matter how hard you flap your arms. The same cache structure that you criticised in Barcelona Intel had to adopt for Nehalem if they wanted a multi-core multi-processor architecture that would scale. It's just not ideal for single-thread is the only drawback, Penryn is.