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To: Bilow who wrote (1356)10/26/1997 1:02:00 AM
From: randal sexton  Read Replies (1) | Respond to of 2389
 
Interesting post. A point:
One way to measure the cost of a pld/gate array/fpga thing
is the cost of the package + the cost of the silicon inside
the package.

Your post made some points about designs of ~100k gates, but
there is a lot of the total market that is considerably below
that size, and there is a substansial part of the market of
logic densities that are less than say 20k gates.

What happens when cost of package is >= cost of silicon?
Cost of the thing is dominated by cost of package NOT silicon!

Off the top of my head I guess that the density of logic on silicon that is about == to the cost
of the package it comes in (for some fpgas)is about 4k to
8k gates( or 8k to 16k gates, depending on how you count the gates:
the various gate-counting metrics is something to be aware of).

So here is an exercise to the student: who will own the market
of parts where the cost of the part is dominated by package cost,
and Why?

-randy