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To: Tony Viola who wrote (38524)10/31/1997 2:43:00 PM
From: Paul Engel  Read Replies (1) | Respond to of 186894
 
Tony - Re: Pentium II/Deschutes & L2 Cache

The 0.25 micron Deschutes will support the "generic" L2 cache chips provided by NEC, Toshiba, IDT, etc,, as you noted. These SRAM chips are addressed at HALF the processor speed. These will be part of the Slot 1 package.

However, the Deschutes will also support L2 SRAM Cache chips that are accessed at FULL PROCESSOR speed up to 450 MHz (initially), and these will be part of the new Slot 2 confuguration.

And who will make these speedy cache chips? Why, Intel, I think! Check out the abstract of a paper they will present at the ISSCC next February:

sscs.org

22.6 - A 450MHz 512kB Second-Level Cache with a 3.6GB/s Data Bandwidth - 4:15 PM

B. Bateman, C. Freeman, J. Halbert, K. Hose, G. Petrie, E. Reese Intel Corp., Hillsboro, OR

A 450MHz 512kB 4-way set-associative cache SRAM with 3.6GB/s data rate utilizes a tightly-coupled source-synchronous 72b data bus. The 0.35mm CMOS process with 0.22 mm Leff provides 4 levels of metal.

Paul