To: FJB who wrote (43805 ) 2/1/2010 12:44:23 PM From: Sam Read Replies (2) | Respond to of 60323 One more thing about this alleged lead in process technology: it is illusory at best. Consider the following excerpts: First, IMFT: Intel/Micron Move to 25nm Flash Production: Double the SSD for Your Dollar BY: J.R. Nelson, DesktopReview.com Editor PUBLISHED: 1/30/2010 Intel and Micron's joint manufacturing company, the Intel-Micron Flash Technologies group, just announced that they've started sampling products based on a new 25nm manufacturing process - their smallest yet. On the left [EDIT: the "left" is the "top" here] is a picture of 4GB of 2-bit MLC flash storage based on the 34nm process the companies switched to using last year; it's 172mm2 in area. On the right is 8GB of 2-bit MLC flash storage based on the new 25nm process; it's just 167mm2 in area.desktopreview.com Here is Sanshiba, in an article from last Feb in fabtech.org: In SanDisk’s latest analyst conference call held at the beginning of February 2009, executives noted that the conversion to 32nm production would begin in mid-2009. Importantly, both 4x and 3x cells will be ramped. Eli Harari, Chairman and Chief Executive Officer of SanDisk“Our 32 gigabyte x3, a 32nm NAND chip, is 33% smaller than a competitor's 32 gigabyte MLC chip with their 34 nm technology,” commented Eli Harari, Chairman and Chief Executive Officer of SanDisk Corporation, during the recent conference call. “That means that the extra bit per cell is equivalent to a half-generation cost advantage, which ultimately would translate to significantly more favorable product margins.” SanDisk has now revealed that the advances in 32nm process technologies and in circuit design significantly contributed to a 113mm2 die size. fabtech.org So Sanshiba's die size at 3-bit 34 nm is 113mm2, while IMFT's die size at 2x is 167mm2. You decide whose will be more cost-effective.