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Technology Stocks : AMD:News, Press Releases and Information Only! -- Ignore unavailable to you. Want to Upgrade?

To: David A. who wrote (1963)	11/5/1997 2:44:00 AM
From: Paul Engel	Read Replies (1) \| Respond to of 6843

David A. - Re: "Are the 200 & 233MHZ Tillamook .35 or .25 processors?" These are both 0.25 micron devices. Re: "In your opinion will the mobile K6 be a viable competetor in this market? " It could have been, had AMD delivered a 233 MHz. low power K6 at the time of the K6 introduction. In fact, prior to that time, many journalists , and SI posters, were declaring AMD the "noteBook" winner because the pre-launch publicity of the K6 touted the high speed, low power characteristics of the K6 - and it was widely assumed that Intel would have nothing but the Klamath/Pentium II for speeds >200 MHz, which admittedly consumes way too much power for a notebook. And now, AMD has to shrink the K6 to get the speed up and the power down for the K6. AMD "leaks" imply that the K6+ (0.25 micron) will run at 266 MHz at 2.1 volts and consume 8 - 10 watts. This won't cut it. They may have to cut the voltage, and hence the upper speed, to get the power down to 5 or 6 watts (Tillamook consumes 4 watts at 233 MHz). This may limit the K6+ to 233 MHz for notebooks. On top of all the technical difficulties, NoteBook vendors need devices to put into their machines and AMD is not producing in really high volume. Their yield problems are hurting them badly - not just now, but this may impact future sales, as well. Re:" Also, Why would AMD create an on chip L2 cache for the K6+ instead of a large L1 cache like the Pentium Pro? " The Pentium Pro has a comparatively small L1 cache "on chip" - that is, on the same piece of silicon as the Pentium Pro itself. This is only 16 KiloBytes. The Pentium Pro "package" is a dual cavity package and the L2 cache SRAM is a separate silicon die that is housed in the second cavity. The electrical interface to the Pentium Pro is implemented with a special GTL+ (Gunning Transistor Logic+) interface that provides very high speeds with low voltage swings. Both the Pentium Pro and the special SRAM chip are designed and built by Intel. As for AMD's announced plans for an L2 cache on chip - I'm not sure I understand exactly what they mean, so I can't comment yet on that particular idea. I will add that the addition of more cache (L1 or L2) is generally done to increase overall performance, so ultimately, that is the goal. Paul