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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?


To: Petz who wrote (25785)11/10/1997 6:14:00 PM
From: Bill Jackson  Respond to of 1579241
 
Petz, That sounds logical, Thanks EOM.



To: Petz who wrote (25785)11/10/1997 7:53:00 PM
From: Ali Chen  Respond to of 1579241
 
John, re:<at 500 MHZ will the socket 7 keep up?> More or less I agree with you.

The actual performance depends on some distribution between memory-bounded pieces of code, and CPU-bounded pieces of code. On average, the socket7 memory bus is far from saturation. This balance is also affected by code/data locality and how it fits the system cache mapping and design. To design the so-called "balanced system" you need some assumptions about this distribution. Or you need to target a certain range of application, as AMD did.

Unfortunately, this distribution is a moving target since software designers are using newer and newer tools, application requirements become bigger and larger, or just totally different, use different memory structures, new subset of instructions appears, new accelerated hardware appears, etc. etc. The winner will be the one who can better forecast these trends in workload (within constraints of economics and manufacturing). Or ajust their design faster. So far Cyrix seems to be the best in the business application area - they have decided to go with an unified L1 cache, which gives more flexibility on mixed code- and data-intensive workload (IMHO). Intel, in turn, believes that they can just command/define all these trends... Everything is not so simple these days...

Regards,

Ali



To: Petz who wrote (25785)11/10/1997 8:11:00 PM
From: StockMan  Read Replies (1) | Respond to of 1579241
 
p,
Re -- BTW, if AMD doesn't have L2 cache on-chip or 100 MHz bus before July, '98..

It bothers me that an intelligent bloke like you can concieve of such a scenario.

p when do you suppose AMD stock will reach its normal price of 12?

Stockman