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Technology Stocks : Advanced Micro Devices - Moderated (AMD) -- Ignore unavailable to you. Want to Upgrade?


To: Elmer Phud who wrote (267199)5/5/2011 3:42:11 PM
From: Mahmoud MohammedRead Replies (1) | Respond to of 275872
 
Elmer,

Re: "Could you offer your opinion about how much of Intel's new gate structure process technology is protected by
patents which will not be included in current cross licensing agreements?"

I am not a legal expert, so I will let our resident "internet legal expert" issue his usual BS on the "legality" of
X-licensing agreements. Here is just one example of an INTC patent (filed in 2006) that is used in
this 3-D structure implementation -->

Protection of three dimensional transistor structures during gate stack etch Brian S. Doyle et al

google.com

I'm sure there are many more patents needed to create this 3-D FET.

However, I would like to comment on the importance of this technology improvement. As I mentioned in an earlier
post, everyone should try to understand the INTC slides that describe this process -->

download.intel.com

This presentation describes important FET parameters (Ion, Ioff, switching speed, ...). These alone would
make this technology impressive. The improved switching speed comes from not only higher Ion, but also reduced
Source/Drain and substrate capacitance. This occurs due to the elevated nature of the device and no electrical connection
to adjacent devices.

But one of the big advantages I see is the effective increase in device width (W). Looking at slide #16, you can see
that the device width is determined by the height of the "fin" as well as the top width of the "fin". This is
important as designers like to use minimum device sizes (L/W) particularly in SRAM's. As width is reduced, threshold
voltage (Vt) variation increases. Designers in this technology can put FET's closer together with effectively
greater device W. SRAM speed is very dependent on matched pairs of FET's having exactly the same Vt. This process
should provide better Vt matching because minimum devices will effectively have larger W's.

Again, investors (AMD, INTC, ARMH, ...) should try and understand the slides presented by INTC on this
latest technology. Otherwise, viewers of this board and "other AMD boards" could be duped by some "idiots"
issuing faulty process interpretations (eg. Mr Lib).

Mahmoud