Group working together on MPEG4 silicon. I wonder when it will break up?.............
techweb.cmp.com
Consortium targets MPEG-4
systems-on-silicon
By Peter Clarke
LEUVEN, Belgium -- A European research organization and several
Japanese companies are preparing to launch a collaborative development
program that will design a processor architecture around the MPEG-4
multimedia standard.
The three-year Multimedia Image Compression (MIC) program, which is
scheduled to start on Jan. 1, was conceived at the VLSI Systems
Development group at the Interuniversities Microelectronics Center (IMEC),
based here.
The primary objective of the program is to produce a system-on-a-chip
MPEG-4 decoder architecture that is optimized for high performance and
low power consumption, said Jan Bormans, MIC program manager at
IMEC. The work will be achieved through a series of subprograms covering
such specific tasks as MPEG-4 wavelet-based texture coding and the
development of CAD tools that support the hardware/software codesign of
MIC-architecture implementations.
The CAD tools are needed because the program is aiming at a system level,
or a higher level of abstraction than current design practice. In taking that
approach, the program could find itself running counter to conventional
architectural wisdom.
Initial participants in the program could not be named before the signing of
contracts, Bormans said, since "this is a long-term program."
He added that "the initial contacts were made within the MPEG-4 committee,
but earlier this year we did a prospective tour of Japan."
IMEC has targeted Japan as a source of partners because the MPEG-4
standard will affect the consumer market, and program participants will have
a hand in defining interactive multimedia and electronic game capabilities that
are delivered through home set-top boxes and mobile terminals, Bormans
said. "It's something that Japanese companies have a prime interest in," he
said.
The size of the program has already been outlined, Bormans said. "The target
is 10 companies, certainly not more," he said. But it is likely that the program
will start with a smaller number of companies, on the order of five or six, he
said. Participating companies will each pay a subscription fee to join the
program, and each will send researchers on assignment for several months at
a time to work with the MIC team at IMEC before returning to their parent
companies.
Collaboration in the program will also allow Japanese companies to leverage
IMEC's position within the mainly European-based MPEG-4 working
groups. It further will allow IMEC to transfer to industry some strongly held
ideas on system design.
Those ideas include the importance of supporting the development of
application-specific instruction processors (ASIPs). Another idea of
importance to IMEC is the need to address distributed memory organization
within a system-on-a-chip design.
Bormans' views stand in contrast to some generally held beliefs. Some
observers assert that general-purpose processors, such as those
manufactured by Intel Corp., provide the lowest-cost platforms and have
sufficient processing capability to execute a variety of multimedia decoders in
software; thus, they say, such processors will drive out all other architectural
approaches.
In contrast, Bormans believes the market will see a spectrum of offerings,
ranging from general-purpose hardware, through general-purpose processors
supported by dedicated hardware co-processing, to MPEG-4 ASIPs.
Software running on a general-purpose device will provide the lowest level of
optimization and the lowest capability, he said.
Midrange entries
Somewhere in the middle of the spectrum are the Chameleon processor,
from SGS-Thomson Microelectronics, and the Tri-Media processor, from
Philips Semiconductors, Bormans said.
SGS-Thomson is preparing to announce Chameleon, its superscalar 64-bit
microprocessor, in 1998. Chameleon is being developed specifically to
address the MPEG-4 multimedia standard. Philips is advocating use of its
Tri-Media very-long-instruction-word processor architecture for the same
purpose. The two companies are working together within a European
collaborative program called Emphasis, which is set to run until October
1998.
"Chameleon is targeting the MPEG-4 set-top box market [in contrast to
IMEC's low-power emphasis], but even for SGS-Thomson, it could be good
to join the program," Bormans said. "We already have a good collaboration
with SGS-Thomson in Bristol [United Kingdom] within the MPEG-4
committees."
Nonetheless, many processor-development teams are missing some
important system-level points, Bormans said.
For example, any present-day system with an advanced display
capability--such as a multimedia PC--features system power consumption
that is almost directly proportional to memory accesses, he said.
That is due to the systems' large amounts of memory and to the
cache-memory architectures that have established themselves, he said, citing
the levels of possible circuit integration and the differences between CMOS
logic and DRAM processes. But the background factors that shape today's
architectures will disappear when memory and logic are integrated in the
system-on-a-chip era, Bormans said.
"There are two approaches: DRAM embedded within a logic process, and
logic embedded within a memory process," he said. "In fact, we favor
embedded logic.
"Embedded DRAM is what's being used today. It may help in the short term,
but in multimedia systems most of the transistors will be for memory.
Therefore, you should use a process optimized for memory. You can afford
the performance and density loss due to your logic being less well-optimized."
As a result of this thinking, the MIC architecture will likely be based around
numerous "object" processors closely coupled to distributed memory. "The
idea is to group together those things which have to be grouped together,"
Bormans said.
Even with current architectures, he explained, it is memory access and not
instruction processing which is rapidly becoming the bottleneck in systems
performance.
"You can improve clock speeds, widen data paths, lower voltages, and move
to deep-sub-micron process technology," Bormans said. "You can do all that
to cope with critical instruction-processing problems. But the problem is that
the proportion of a chip you can reach within one clock cycle is diminishing.
It's not really addressing the wall that's coming up."
The only way to achieve a substantially more power-efficient design is to
optimize the architecture at a much-higher level than it is at present, Bormans
said.
Bormans expects the MIC program will also provide some continuity with the
European Emphasis program. "Emphasis is ending and a request to extend
the program has been rejected, so of course we are targeting some
of those participants as well," the program manager said. "Demonstrating
MPEG-4 on Chameleon and TriMedia were the main goals for Emphasis. It's
hard to increment on that. But some of those companies might join IMEC to
determine what should be included in the next-generation architecture."
The exact composition of the MIC team will be announced in early 1998. |
