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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: Time Traveler who wrote (26486)	12/5/1997 2:09:00 PM
From: Jeff Fox	Respond to of 1572510

John, re: higher I/O voltage Generally the higher voltage I/O can have circuits that lower the gate voltage. This works because there are few enough devices in the I/O area that the complexity doesn't hurt much. Of course I don't know the the K6 design. AMD could be just "taking a chance" with the high voltages. Jeff

To: Time Traveler who wrote (26486)	12/5/1997 3:22:00 PM
From: Yousef	Read Replies (1) \| Respond to of 1572510

John, Re: "Are you saying the thickness of this oxide is different between the core and the non-core in K6?" No, the gate oxide thickness is the same for the core and periphery (Pads). The real issue is Hot Carrier Injection (HCI). HCI is a condition where carriers (electrons in NFET) are accelerated by the electric field applied from source to drain. These accelerated carriers obtain enough energy to be trapped in the gate oxide. This trapping of "Hot Electrons" causes the device to shift its threshold voltage. This shift in Vt will reduce NFET Idsat and thus slow down the CPU. This is the primary reliability issue that I am concerned about with raising the supply voltage. Make It So, Yousef