Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : CYRIX / NSM -- Ignore unavailable to you. Want to Upgrade?

To: FJB who wrote (21848)	12/7/1997 2:14:00 AM
From: FJB	Respond to of 33344

Interesting post from Paul Engel. Message 2899033 More importantly, Intel has discussed follow-on Deschutes chips for the lower cost sub $1,000 PC market. (This differs from a sub-zero PC, the kind from AMD and Cyrix which produce SUB-ZERO PROFITS ). Specifically, a chip (Mendocino) with built in L2 cache of 128 Kilobyte or 192 kilobytes of SRAM as part of the CPU chip itself is part of Intel's roadmap. How can adding memory reduce costs? Frankly, it can't. BUT - if Intel uses the FLASH EPROM redundancy capability, they will be able to minimize the cost of these CPUs + L2 Cache chips by keeping yields high via the use of redundancy. No plans for an integrated MPU?