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To: FJB who wrote (22054)12/15/1997 11:27:00 AM
From: Scumbria  Read Replies (1) | Respond to of 33344
 
Robert,

Hopefully we have all been put on earth to shed light, not confusion.

I will restate my point again. There are numerous physical effects which tend to cause larger die to run at lower frequencies. Do you dispute this point??? I feel like I'm conversing with a lawyer.

> intel.com
says that PII with 512K L2 is 560 mil/side, which converts to 203mm2. Perhaps I am misinterpreting the document, but that is really irrelevant to the discussion.

Profitability of a company requires that expenses are less than revenues. This should be a point which we all can agree on.

Scumbria



To: FJB who wrote (22054)12/15/1997 11:27:00 PM
From: Robert G. Bianchi  Respond to of 33344
 
Bob G.,

No, I would have said dice if I meant to include the area of the SRAM die. The die size of the PII MPU core on what Intel calls its 0.35æ process is 203mmý. This figure does not include the onboard SRAM.

Check the May 12, 1997 MPU report for a picture of the die(excluding any other dice) and the 203mmý caption. You can also refer to:
intel.com;

Nice stuff of Scrumbia!

Nothing like the facts to get in the way of a good argument! <g>

Bob


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