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Technology Stocks : Compaq -- Ignore unavailable to you. Want to Upgrade?

To: g_m10 who wrote (11588)	12/17/1997 3:34:00 PM
From: Elwood P. Dowd	Read Replies (2) \| Respond to of 97611

Pretty poor showing this afternoon, looks like we'll head back to the low 50s. S.

To: g_m10 who wrote (11588)	12/17/1997 4:54:00 PM
From: Meathead	Read Replies (1) \| Respond to of 97611

Boris - Currently, Intel is shipping it's PentiumII 300Mhz in a slot1 configuration for 66Mhz busses. The 333Mhz will also be a slot1 for the 66Mhz bus. Early next year when BX ships, the front side bus (Host) will increase to 100Mhz. Intel will ship Slot1 and Slot2 PentiumII's specifically for this bus. You won't be able to tell the difference by looking at the SEC cartridge whether it's designed for 66 or 100Mhz FSB. The easy way to tell is by the processor speed. 66Mhz FSB processor speeds are in increments of 33Mhz e.g. 233, 266, 300, 333 whereas 100Mhz FSB will be in increments of 50Mhz.. 300, 350 400, 450. Obviously, at 300 it's confusing. You are correct, Slot1 SEC cartridge (what we call PentiumII) integrates the processor and L2 cache as seperate components on a small daughtercard. For Slot1, the L2 cache runs at half core frequency, i.e for 300Mhz, cache runs at 150Mhz. For slot2, L2 runs at full core frequency and will come in sizes of 512k, 1Meg and 2Meg. This is where slot2 gets it's performance advantage over slot1 and will be perferred in Servers and Workstations initially. Intel's reason for moving to the SEC cartridge design are many but the main two are 1. SEC is proprietary and AMD/Cyrix won't be able to manufacture pin-for-pin compatable replacements. This leaves them with socket 7 or a SEC design of their own. 2. Yield improvements. Pentium integrates L2 cache die with processor die in a single chip. If L2 fails test, you need to throw the whole chip away. It's simply a more complex solution. MEATHEAD