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Politics : Formerly About Advanced Micro Devices -- Ignore unavailable to you. Want to Upgrade?

To: FJB who wrote (26961)	12/19/1997 1:58:00 PM
From: Investor A	Read Replies (1) \| Respond to of 1573950

Bob, Actually, Intel has demo the PII cacheless chipset with SLAT 1(?) in the last Taipei Computer Show two weeks ago. Intel is going to use .25u for the most profitable higher clock speed versions. The cacheless PII-266 should use the current .35u to squeeze the last milk from their current fab plants. This technology loser could only play the game of with or w/o L2 cache to meet the challenges from AMD and Cyrix. They couldn't even fix their FPU bugs in EIGHT months after DAN411 was disclosed. There is no reasons to expect surprises from Intel, especially in technology innovations.

To: FJB who wrote (26961)	12/19/1997 2:08:00 PM
From: kash johal	Read Replies (2) \| Respond to of 1573950

Bob, why do you think Intel is redsigning the PII. If all they were doing was taking the L2 cache out of the module the PII die would not change (hence no redesign). I believe they will reduce the L1 cache substantially also. This way they will have a super low cost chip, clock it at 250-300Mhz and have a segment zero player. In absolute performance terms this may be a dog, however if you are a segment zero customer.....would you rather have a INTEL Pentium II running at 300 Mhz or something called a K6. The regular customer is not sophisticated enough to care about PR ratings or cache rams Level 1 or level 2. This is why the new GX 220 and soon to be born GX 250 in early 98 will be a hot players, the customers want Mhz etc. Best regards, Kash