SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : AMD, ARMH, INTC, NVDA -- Ignore unavailable to you. Want to Upgrade?


To: Vattila who wrote (16106)6/2/2016 9:58:53 AM
From: fastpathguruRead Replies (2) | Respond to of 72369
 
On the other hand, the links on an interposer will incur penalties relative to a monolithic die, so it is a trade-off as well. And interposer technology is still in its infancy, adding counter-acting difficulty and cost. However, if these can be overcome, it seems the right way to go for SOC and large-transistor-count devices, such as GPUs.
I think die stacking/interposer tech can be a huge cost saver... It's the next generation of integration. 90% of the motherboard disapears if you integrate cpu, gpu, memory, and IO into a single socket! The limits of interconnect are essentially gone compared to motherboard traces... Printing out interposers with many 1k-wide links ought to be cake, and stacking heterogenous dice likewise ought to be cake once the technology matures. The socket is going to become nothing more than a port that connects power and peripherals to the "system"; Performance goes way up; Footprint and power is reduced; Cooling is centralized; Assembly is simplified;

What the interposer represents is no less than the absorption/elimination of a large portion of the PC food-chain.

fpg