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To: FJB who wrote (742)	1/8/1998 3:14:00 PM
From: Mason Barge	Respond to of 1305

Can anyone explain to me how the TI process is going to increase transistor density? If they use etch to decrease line width, aren't they still going to be limited by lightwave size in the line spacing?

To: FJB who wrote (742)	1/8/1998 4:18:00 PM
From: TheSpecialist	Read Replies (1) \| Respond to of 1305

Using silicon rich oxy-nitride for reflection control is the most current attack angle on controling linewidths. It is being researched and implemented by most of the leading edge semiconductor manufacturers. TI's use of it combined with a resist etch process allows them to get linewidths in the .06 micron range. However, it does not allow them to utilize the smaller geometries to increase their feature density. It only provides them with a smaller, faster gate. The inability to increase the number of gates (transistors) from this technology, limits its impact and use in mainstream semiconductor manufacturing. TS