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To: Stormweaver who wrote (3975)1/14/1998 3:22:00 AM
From: Alexis Cousein  Respond to of 14451
 
> - most stable and standard UNIX, NCR to standardize on
> Solaris now

But recently Sequent switched to DEC Unix, probably becasue of 64-bit issues.

>SGI -
> - 64 bit already
> - good graphic software + grahpic capability
> - good low end price points
> - SVR4 yet??

Since release 5.2 (about 3 years ago).

- binary compat between arch's ???

Yes. I'm still running some apps I compiled on a Personal IRIS (1990)
running 5.3 on my O2 (1997) ;).

- binary compat between OS releases ???

Yes. All SVR4-based releases, that is. 4.0.5 used COFF binary
format binaries; there was compatibility support for these up to 6.1.

- threaded kernel ?

Yes.

- what thread standard supported??

That's question is, I think, obviously for threaded user apps, not kernel.

POSIX pthreads, sequent-like sproc() based calls, and heavier process-
based models with thread-like characteristics using pcreatel(). Some of the libraries (like BLAS et al) can automatically be threaded on MP systems without touching the application, and there have been autoparallelizers for C and Fortran for some time.

- ? any good mid-range boxes (between Cray and o2000?)

O2000 already expands a *long* way into what you would call Cray space (hence the branding Cray Origin2000 for these larger systems). You basically use 8-CPU building blocks ans stack them together; some customers are already using single-system-image 128 CPU boxes.

Cray has a box (T3E) that's quite similar, but has CPUs and CPU to memory subsystem well tuned to the specific spaces of hand-tuned MPP number-crunching programs (different from the usual cache-based approach), up to 2048 CPUs, the interconnect is different (so that you can fit many CPUs in a smaller space).

And Cray has small and large vector-processors, but they're different beasts altogether (the class of codes optimized for general-purpose CPUs and vector processors are different, though many codes are migrating to use general-purpose CPUs on SMP/ccNUMA).