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To: Investor A who wrote (23103)	1/19/1998 12:23:00 PM
From: patrick tang	Read Replies (1) \| Respond to of 33344

Fuchi, Below is the Intel SDRAM/DIMM spec., the 133mHz should fit the 100mHz bus. Various manufacturers that I know of have got this out for the 16M generation: MU, Goldstar, NEC etc. You just need to ask for the 133mhz product. For the first generation, PC100, one needed to buy 100mHz product to fit into 66mHz bus, e.g. all the problems with the Mustang board and having to loosen up the DRAM timing all the way for SDRAMs. But that learning curve is pretty much over, the VP2/3 stuff all run SDRAMs quite adequately, hence one can even tighten up all the timings in the BIOS (doing it now on PCchip VP2 and Hitachi/Fujitsu SDRAMs). And this learning process was by both the DRAM guys in designing better parts and also the chip set guys in desigining more DRAM-friendly chip-sets. I am not sure who has PC133 out in 64M versions, but all major guys are working on it. Fujitsu is supposedly to have it around May. developer.intel.com Notice that the 64M allows for up to 4 banks vs 2 banks for 16M and 1 bank for EDOs. I have a VP3 board that the BIOs allows for selection of # of banks. In the PCchip VP2, I believe the BIOS call that 'speculative read' for SDRAMs. patrick tang