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To: Craig Freeman who wrote (23223)	1/23/1998 1:53:00 AM
From: Peter Dierks	Respond to of 33344

Craig, What is TSMC's yeild? Peter

To: Craig Freeman who wrote (23223)	1/23/1998 2:09:00 AM
From: FJB	Respond to of 33344

Craig, I was looking for more specific information about TSMC's process. UMC uses the following design rules according to MDR, but I haven't seen any numbers for TSMC. Supply voltage 2.5V I/O voltage (max) 3.3V Gate length (drawn) 0.24 Channel length (effective) NA Gate oxide thickness 50A Number of metal layers 5 M1 contacted pitch 0.64 M2 contacted pitch 0.76 M3 contacted pitch 0.76 M4 contacted pitch 0.76 M5 contacted pitch 1.2 M6 contacted pitch Local interconnect? No Bob