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To: Adrian Wu who wrote (4035)	1/23/1998 12:35:00 PM
From: Kevin K. Spurway	Respond to of 6843

Isn't Mendocino a Pepperidge Farm cookie?

To: Adrian Wu who wrote (4035)	1/23/1998 12:37:00 PM
From: Paul Engel	Read Replies (1) \| Respond to of 6843

Adrian - Re: "Please supply more detail on the Mendocino." The Mendocino will be essentially a Deschutes with either 196K or 256 K of L2 cache grafted on to the same chip as the Deschutes itself. I think this is pretty similar to the AMD K6 3+ concept. Re: " I thought the new Deschutes with the full speed CSRAM (as opposed to the BSRAM which only runs 1/2 speed) can only use the slot 2 and a 450NX chipset." The Deschutes can use the 440LX, 440BX or the 450 NX chip sets. The Deschutes can also be configured with EITHER full speed or half speed backside L2 cache. The Deschutes will also be shipped in BOTH Slot 1 AND Slot 2 configurations. On Monday, Intel will announce the first Deschutes - 333 MHz, Slot 1 and systems with the 440 LX will be announced. I suspect this version will use the half speed L2 SRAM cache. The Deschutes with full speed L2 SRAM cache will begin to appear in March/April. The full speed SRAM is made by Intel - capable of 450 MHz cycle times! Paul