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To: Vattila who wrote (35440)	3/3/2020 3:29:58 PM
From: THE WATSONYOUTH	Read Replies (1) \| Respond to of 73964

*TSMC Announces 2x Reticle CoWoS For Next-Gen 5nm HPC Applications* ....wow....1700mm^2 now .... and at least 2500mm^2 shortly................well that should keep you busy for quite a while coming up with all the possible AMD configurations at 5nm.................get cracking and report back with your best guess/guesses. :)

To: Vattila who wrote (35440)	3/3/2020 3:41:44 PM
From: neolib	Read Replies (1) \| Respond to of 73964

The idea that Intel will regain process leadership is laughable now. Both TSMC and Samsung bake far more silicon than Intel does, and Intel will be under much worse price pressure from AMD going forward, given that AMD has the near term process advantage. BTW, did you note that Ampere claims they will have an annual cadence on their server parts. That is driven by the fact I suspect that ARM will have an annual cadence on the cores, since they are used to doing so for the mobile hordes. I would almost bet that Ampere (or perhaps AWS or one of the Chinese) will have 5nm ARM based servers out before AMD gets to 5nm. I did like the fact that Ampere's cost advantage over AMD was much slimmer vs what they had on Intel. Given how hard the lift is in penetrating servers, a small delta over AMD on x86 will be more difficult to make for them.