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Technology Stocks : CYRIX / NSM -- Ignore unavailable to you. Want to Upgrade?


To: FJB who wrote (23262)1/27/1998 7:13:00 PM
From: StockMan  Read Replies (1) | Respond to of 33344
 
Bobby,
Re -- What does a cacheless 266MHz PII have to do with Intel's 0.25um process?

A lot. The reply was to Joebob. Why don't you b*tt out if you don't understand the context. The issue which JoeBob was refering to was Intel's Mhz advances. The process has much to do with this.

Given that Cyrix systems (PRcrap) are now sold at a premium to the same PR equivalent pentium systems. NSM should really shut down the cyrix wiggling and concentrate on the "system on a chip".

It appears that LSI, VLSI etc... are leaving NSM behind even in this emerging field. But then what can one expect with those Cyrix "smart" guys around.

Stockman



To: FJB who wrote (23262)1/27/1998 8:49:00 PM
From: robert scheb  Read Replies (1) | Respond to of 33344
 
Robert

Yes, I did see the post you mentioned but had to run so couldn't reply.

StockMan

Re.. It appears that LSI, VLSI etc... are leaving NSM behind even in this emerging field. But then what can one expect with those Cyrix "smart" guys around.

Appears seems to be the key word here. Are you betting on both of
these stocks? I'd like to buy some LSI or VLSI. Should I buy both?

Scheb



To: FJB who wrote (23262)1/27/1998 9:42:00 PM
From: Yousef  Read Replies (1) | Respond to of 33344
 
Bob,

Re: "Have you located any info concerning TSMC's 0.25um process?"

I have obtained some details about TSMC's .25um process:

2.5V Device
.5V NFET/ -.5 PFET (Vt's)
610ua/um NFET/275ua/um PFET (Idsat)
55A gate (electrical)
3/4/5 levels of metal as options
Borderless contacts
Unlanded Vias
TiSi2
Tungsten Plugs
CMP oxide/W
Stacked Vias

Pitches:

Poly ....... 640nm
Metal 1.... 720nm
Metal 2.... 880nm
Metal 3.... 880nm
Metal 4.... 880nm
Metal 5.... 1200nm

This process looks like a .35um device coupled with a .25um (dense)
interconnect. I would expect CPU's in a process like this to be
limited to 266mhz -> 300mhz.

Re: "What does a cacheless 266MHz PII have to do with Intel's 0.25um process?"

This was not what we were talking about ... I believe that the subject
was the 350mhz and 400mhz PII's to be announced in April. Intel is
accelerating their process development and CPU schedules. It really is
quite "frightening". If NSM/Cyrix just goes after the low cost market,
they will continue to lose money ... and ... as Intel executes their
technology plans, Intel can afford to reduce the price on the lower
performing CPU's.

Make It So,
Yousef