SI
SI
discoversearch

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor.  We ask that you disable ad blocking while on Silicon Investor in the best interests of our community.  If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.
Technology Stocks : AMD:News, Press Releases and Information Only! -- Ignore unavailable to you. Want to Upgrade?

To: Petz who wrote (4220)2/3/1998 10:08:00 PM
From: Yousef  Respond to of 6843
 
John,

Re: "How much space is wasted between each die? Even a mm between die
would waste over 20% of the area."

Typically the "scribe width" is about 150um - 175um (this translates
to .15mm - .175mm) on each side.

Hope this helps.

Make It So,
Yousef



To: Petz who wrote (4220)2/4/1998 12:41:00 AM
From: Paul Engel  Respond to of 6843
 
Petz - Re: "please comment on my guesstimate of 400 candidate CPU's per wafer for a 68mm^2 die size. "

That sounds like a reasonable number, although it may be slightly higher at 410 possible good die/200 mm wafer.

Paul


HomeMailHotSubjectMarksPeopleMarksKeepersSettings
Terms Of UseContact UsCopyright/IP PolicyPrivacy PolicyAbout UsFAQAdvertise on SI
© 2025 Knight Sac Media.  Data provided by Twelve Data, Alpha Vantage, and CityFALCON News