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To: Andrew Vance who wrote (757)2/5/1998 2:12:00 PM
From: AJM  Respond to of 1305
 
AMD cancels investor conference appearances; switch to 0.25 micron

biz.yahoo.com

Thursday February 5, 1:42 pm Eastern Time

NEW YORK, Feb 5 (Reuters) - Advanced Micro Devices Inc said
Thursday it has canceled plans to appear at conferences hosted
by Wall Street firms until it can offer a meaningful update on
the progress of a major production transition at the company.

AMD is in the midst of a switch to 0.25 micron production for
its K6 processor, which competes with Intel Corp's (INTC -
news) Pentium II.

Production is currently ramping up and solid data on chip wafer
yields is still weeks away, said spokesman Scott Allen. He said
AMD planned to avoid Wall Street analysts' meetings until executives
could answer project-related questions.

''We are not just a microprocessor company,'' Allen said, ''but at
any of these conferences, things will always come back to the
question of, 'How many K6 units will you do in the first quarter?'

''For now, we really don't have anything to add to the record,''
he said. ''In the meantime, we're just concentrating our efforts on
executing this ramp-up.''

AMD backed out of a recent conference hosted by PaineWebber and has
also notified Goldman Sachs, Donaldson Lufkin & Jenrette and
Morgan Stanley Dean Witter that it would not participate in upcoming
conferences hosted by the firms.

AMD fell 3/4 to 19-1/4 in early afternoon activity.



To: Andrew Vance who wrote (757)2/5/1998 7:28:00 PM
From: D. K. G.  Read Replies (2) | Respond to of 1305
 
Andrew, I have a question in regards to current lithography
design rules industry wide and the future roadmap.
Memory(DRAM) is now crossing the 0.25uM threshold.
What about Logic, ASIC, DSP ? and other any other
significant chip segment I've failed to mention.
For instance the 98 expectations for ASMLF's stepper mix is a
50% DUV to I-line.It is looking like the other stepper makers
are also shipping the same mix. From what I've read.
On the other hand, Dallas Semi's products are undergoing
shrinkage but I think they still are able to use .60um design
rules for most of what they make. Eventually they will move lower.
I'm just trying to get a sense of how the migration
to DUV will progress among the various chipmakers.


I've taken the liberty to set up a chart to help better phrase my question. Please edit and include items as you see fit.

__________________________% DUV

Chip Segment_____98_____99____00____01_____

DRAM____________ 50

Logic

ASIC

DSP

Others
I'm omitting ?

I hope my question makes sense to you. Thank you for your time and effort contributing to SI on this forum.

Regards,

Denis



To: Andrew Vance who wrote (757)2/6/1998 1:47:00 AM
From: TI2, TechInvestorToo  Read Replies (2) | Respond to of 1305
 
Andrew,
Thanks for the great response. I generally agree with you, particularly the main points. I like the idea of hedging with the reticle producers although I am surprised you don't take it one step further to their suppliers like KLAC for example.

So now we covered extending I-line to 250nm ground rules, what about extending optical to 70 nm rules with TSI (see following ref)?

If you believe that, can you guess the next question?
Thanks for great posts, I lurked before I joined.
TI2

Subject: Cymer (CYMI) NEWS ONLY!
To: Mr. Aloha
From: TI2, TechInvestorToo
Jan 17 1998 2:21PM EST
Reply #328 of 387
Thanks very much for the reference article (see below) showing the work done by SELETE/ASET to push optical lithography below 100 nm by using top surface imaging techniques. As has been discussed on other threads, the key issue is to produce smaller L/S to reduce die size (cost issue) in addition to just smaller gate (performance issue). Can the technologists comment on the viability of this (resurrected) process approach? If viable, then the lasermakers have quite a run before them.
Thanks
TI2

The article from EE Times:
ÿ
Direct Article Link | New Search | Search the Web
January 12, 1998, Issue: 988
Section: News

------------------------------------------------------------------------

ArF laser produces 0.04-micron isolated line -- Lithography advance cuts
patterns below 0.1 micro

Yoshiko Hara

Tokyo - A process technology that cuts chip patterns to the fineness of
a 0.04-micron isolated line has been established by a research
consortium here.

The Association of Super-advanced Electronics Technologies (ASET) took
an argon-fluoride (ArF) excimer laser beyond its wavelength limitation
to cut the finer patterns. More than seven of those finer lines could be
etched in the space taken today by the slimmest state-of-the-art line.

"No optical laser could have cut patterns less than 100 nm," said Masaru
Sasago, research manager at ASET's Hyper-fine Optical Lithography
Laboratory of ASET. But a process advance allowed ASET to "show the
potential of how far ArF can go."

ASET, an R&D organization, runs nine front-edge projects directly
supervised by Japan's Ministry of International Trade and Industry .

ASET researchers recently fabricated a 0.09-micron contact hole and a
0.04-micron isolated line using an ArF excimer-laser lithography
combined with a Top-Surface Imaging (TSI) process. TSI provided the key
to overcoming a resolution-limitation barrier beyond the laser's 193-nm
wavelength.

Compared with a conventional single-layer resist process, TSI requires
silylation-the implanting of a silicon compound agent-after the
exposure. Then the surface is dry-etched with carbon-dioxide plasma. In
this process, areas that were not exposed are etched. Even if the
exposed pattern is somewhat vague, remaining areas form finer patterns
by the etching.

The idea of TSI technology has existed for about 15 years. Progress in
materials and dry-etching opened the possibility to its use in volume
production, Sasago said. TSI is applicable to krypton-fluoride and other
potential optical lithography such as 13-nm wavelength extreme UV as
well.

Using the ArF laser with conventional single-layer resists, ASET
researchers cut patterns as fine as 0.13 micron.

ASET had already used TSI to fabricate 0.09-micron line-and-space
patterns last March. Now the researchers proved ArF could cut isolated
patterns-considered to be difficult with laser lithography-as fine as a
0.04-micron isolated line and a 0.09-micron contact hole. That's roughly
the equivalent of a process for a microprocessor with 160 million
transistors/cm2, according to the Semiconductor Industry Association
(SIA) technical road map. The density is more than 20 times that of a
microprocessor on a 0.25-micron process. The 0.09-micron line-and-space
patterns correspond to a 16-Gbit DRAM process.

"It may be possible for ArF lithography to go as deep as a 0.07-micron
L/S pattern," said Sasago. "I believe that ArF can be used for at least
three generations, in terms of DRAM: the second generation of 1-Gbit,
4-Gbit and 16-Gbit devices."

ASET's ArF lithography project started in February 1996. "At the
beginning, the target was 0.18-micron process," Sasago said. "But as KrF
lithography is now extending into 0.18-micron level, ArF is targeting
0.15 micron and deeper."

Sematech, a non-profit consortium of 11 semiconductor manufacturers
based in Austin, Texas, is running a similar project, Sasago said.
"Japan has strength in resist and process technologies, while Sematech
has strength in glass materials. As a result, ASET and Sematech could
work cooperatively and complementarily," he said.

ASET researchers are now working to establish the basic infrastructure
of ArF-based production by 1998 so that ArF-based mass production can be
launched by 2000 or 2001.

Sample shipments of resist have already started from multiple Japanese
manufacturers and prototype steppers will be shipped this year from
Nikon and Canon. "Except for mask technology, which is slightly behind,
all other technologies are in progress as scheduled," said Sasago.

ASET's result will be transferred to Selete Inc., an R&D company
established by 10 leading Japanese semiconductor manufacturers.

Selete will begin development and evaluation of ArF lithography systems
from next April focusing on practical application of the ArF lithography
in production lines. Selete set the target date for practical technology
to realize a 0.13-micron to 0.1-micron process by the year 2000.

ASET, a five-year project that began in 1996, is being financed by MITI.
Three American companies-Texas Instruments, IBM and Merck-are
participating in some of the research projects.

Among the research programs are efforts to develop technology for future
generations of disk drives and liquid-crystal-display screens as well as ICs.