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A Market Of Many Stripes
Bill Arnold
Gone are the days when memory vendors competed within a narrow range
of DRAM address bit widths, nanosecond access times, and price. DRAM
architectures have evolved from plain vanilla to 31 flavors.
Driven to meet rapidly rising system performance, DRAM designers are
scrutinizing or rejiggering all aspects of DRAM architectures to
make them more system-oriented. They have set their sights on the
configuration of the DRAM array, the clock speed, the I/O, and the
use of on-chip caches, registers, arithmetic logic units, and other
circuitry.
Applying new architectures to squeeze more bandwidth and performance
from DRAMs becomes increasingly critical as system clock rates soar
to 66 MHz, 100 MHz, and higher.
High-speed graphics-memory applications, in which DRAMs are used as
separate devices or embedded in ASICs, are providing a fertile arena
for new architectures. So, too, are better-performing main memories
in higher-end PCs, workstations, and servers, which also can contain
high-speed graphics information in some system designs.
Although several new architectures are targeted at either graphics
or main memory, some can serve both.
However, as promising and as needed as these specialty memories are,
system developers face some important issues in deploying them. The
impact on overall system performance and cost is obvious.
Availability and continuity of the specialty DRAM supply may be
another factor, because some architectures, such as Cached DRAM and
Enhanced SDRAM, have been sole-sourced.
Board layout and space become critical because implementing some
architectures, such as the Rambus DRAM (RDRAM), requires tight
conformance to a reference layout design for optimum performance.
Strong technical support from DRAM vendors, chip-set suppliers,
graphics-controller manufacturers, and board makers for any specific
architecture is equally important.
Also vital is whether graphics-controller vendors are offering
up-to-date devices that enable the successful implementation of
various specialty DRAM architectures.
Market volatility also bears watching. Although DRAM supply may
slightly outweigh demand, there have been enough delays and outright
cancellations of new DRAM fab starts to cloud the market's outlook,
according to industry observers.
Also, DRAM vendors are trying to recover from two years of turmoil.
In 1997 the number of bits shipped grew 89%, while sales dropped
30%, following an even more disastrous 1996, in which bit volume
rose 77%, while sales plunged 38%, said Bill McClean, president of
IC Insights, Scottsdale, Ariz.
This year the overall DRAM market is expected to grow almost 14%, to
nearly $23 billion from $20.2 billion in 1997, as unit shipments
rise to almost 4 billion from 3.2 billion.
Meanwhile, ASPs are expected to drop to $5.80 from $6.25, even as
16-Mbit and 64-Mbit densities dominate, according to IC Insights.
In 1999, sales are expected to rebound to $28.4 billion, as unit
shipments increase to 4.2 billion, and ASPs are projected to rise to
approximately $6.75, as 64-Mbit DRAMs become the dominant density.
The specialty DRAM market is changing rapidly. In the past,
specialty graphics memories were made on less-advanced processes to
keep older fabs running, said Bob Pierce, director of emerging
memories at Siemens Components Inc., Cupertino, Calif. Now, to meet
system performance and market needs, they're made on 0.35-micron or
even more advanced processes, he said.
Siemens expects in the third quarter to see first silicon on a
146-MHz, 16-Mbit (x32) synchronous graphics RAM (SGRAM) from a
0.24-micron process. The company has a double-data-rate (DDR)
version on tap, as well as an SLDRAM.
Another trend is that the market is fragmenting among five or more
architectures at the 64-Mbit level, said Brett Etter, DRAM product
marketing manager at Hitachi Semiconductor (America) Inc., Brisbane,
Calif. In addition, the gap between specialty memory generations is
closing, he said.
Hitachi expects to sample a 256-Mbit SDRAM around mid- year. The
company licenses the Direct RDRAM for mobile and lower-end PC
applications and plans a 64-Mbit DDR SDRAM later this year and a
256-Mbit DDR SDRAM in 1999 for large memory systems, fault-tolerant
systems and servers, workstations, minicomputers, and mainframes.
The chip maker also produces EDO DRAMs.
Fragmentation of the specialty DRAM market also raises questions
about the depth and quality of long-term support for some of the
architectures, according to Jeff Mailloux, DRAM marketing manager at
Micron Technology Inc., Boise, Idaho.
There are so many types of DRAM architectures that getting support
from all vendors may be difficult, he said. Strong technical support
is increasingly important because the precise timing of signals
among system components becomes crucial as clock rates rise and
latencies drop, he said.
Chip vendors are working closely with chip-set, graphics-controller,
and board suppliers to ensure that they are on top of the latest
specifications, Mailloux said.
Micron offers a 256-Kx16 EDO DRAM and a 256-Kx32 SGRAM for graphics
applications and is a licensee of the Direct RDRAM technology.
Another reason for close cooperation among chip-set,
graphics-controller, and board suppliers is that specialty memory
technology usually is ahead of what suppliers are prepared to
support, said Will Mulhern, product marketing manager at NEC
Electronics Inc., Santa Clara, Calif. SGRAMs were available before
the graphics-controller suppliers were ready for them, he said.
Besides EDO DRAMs and RDRAMs, NEC offers 143-MHz, 16-Mbit SGRAMs
with a 572-Mbyte/s bandwidth, and is readying DDR SGRAM and SDRAM
devices. The company late last year also unveiled its Virtual
Channel Memory (VCM) architecture, which was developed to cut
latency problems with DRAM cores in almost any architecture.
Second sources for the VCM technology, which was designed to be an
industry standard, could be announced soon, Mulhern said.
Next summer, NEC plans to sample a 16-Mbit (x32) SGRAM, and by the
end of 1999 the company will follow with a second-generation DDR
SGRAM built around a VCM core.
Generally viewed as the most revolutionary approach to raising
specialty memory performance radically, the RDRAM (co-developed by
Rambus Inc. and Intel Corp.) is in its third generation. The Direct
RDRAM increases maximum bandwidth to 1.6 Gbytes/s at an 800-MHz
clock frequency in a x16 data width or x18 with error correction
capability. This is up substantially from the first-generation base
and second-generation concurrent RDRAMs.
The first two generations are targeted at low-end graphics
applications as well as electronic toys and games, whereas Direct
RDRAM is being positioned as the consumer PC's main memory,
supporting a new family of chips sets and processors that Intel is
developing. Rambus is also eager to exploit the graphics,
communications, consumer, and mobile-computer markets.
In developing the RDRAM technology, Rambus looked at the DRAM and
its interface from a systems point of view. The technology defines a
three-part interface between the graphics controllers and the DRAMs,
according to Rich Warmke, an architecture specialist at Rambus,
Mountain View, Calif.
The technology is implemented in three places: within the graphics
controller, the DRAM, and a dedicated bus or channel that runs
between them, he said. Implementing it on a board requires strict
compliance with a precise reference design from Rambus for optimum
signaling and timing performance.
The first Direct RDRAMs are due out this year, while the
technology's licensees - which include most of the leading DRAM and
controller makers - are already producing base and concurrent
RDRAMs.
Integrated Circuit Engineering Corp. (ICE), Scottsdale, reports that
Rambus and Intel are also collaborating on a newer DRAM technology.
Called next-generation, or nDRAM, the technology may be available by
next year. The nDRAM may use two 8-bit channels to reach a
1.6-Gbyte/s maximum bandwidth, ICE said.
Observers point out that Intel may not necessarily be wedded to
Rambus, and could switch to something else, perhaps SLDRAM, when
that technology bears fruit.
Can the market support all of the available architectures?
There's room for several strong architectures, but some lesser ones
will fade, said Alan Wessel, senior product marketing manager for
application-specific memory products at Mitsubishi Electronics
America Inc., Sunnyvale, Calif.
Besides producing 143-MHz, 16-Mbit SDRAMs, Mitsubishi is a Direct
RDRAM licensee and offers a Cached DRAM (CDRAM) and 3D-RAM of its
own design. The CDRAM, with no second source, provides texture
memory for workstation, PC, and notebook graphics applications. The
dual-ported, 10-Mbyte 3D-RAM frame buffer memory, with S-MOS Systems
and Seiko Epson as second sources, features four independent,
interleaved DRAM banks, a 2-Kbit SRAM pixel buffer, an on-chip ALU,
and 1.2-Gbyte/s peak performance.
There are too many potential graphics architectures in specialty
memories, according to Mueez Deen, associate director of graphics
memory marketing at Samsung Semiconductor, San Jose. But Direct
RDRAMs and DDR SDRAMs are main-memory devices, and SLDRAM also isn't
a graphics-memory architecture, he added. SGRAMs are the most
exciting part of the graphics market today, according to Deen.
To supply the market, Samsung makes 100-MHz and 125-MHz, 8-Mbit
(x32) and 143-MHz, 16-Mbit (x32) SGRAMs. The company plans to sample
100-MHz and 125-MHz, 16-Mbit (x32) DDR SGRAMs for production in the
third quarter; at least four controller manufacturers will support
the products, Deen said.
Projections vary on how the market will shake out.
Deen said that SGRAMs are taking over the midrange and eventually
will displace many EDO DRAMs at the lower end.
Rajit Shah, worldwide marketing vice president at Mosel-Vitelic
Inc., San Jose, charts his course around fast EDO DRAMs for
cost-sensitive graphics applications, a shift to SGRAMs for
applications beyond 100 MHz, and then DDR SGRAMs because
single-data-rate devices aren't economical to build beyond 150 MHz.
Glen Schuster, marketing director for mainstream desktop graphics at
S3 Inc., Santa Clara, predicts that in 1999, SGRAMs will control the
low end, DDR SGRAMs the midrange, and RDRAMs the high end.
Some observers point out that the growing popularity of sub-$1,000
PCs could affect the use and migration of graphics RAMs.
A hot area is embedded specialty memory in which a certain amount of
DRAM is integrated with logic to form an efficient, high-bandwidth,
compact single-chip solution. These chips are customer-specific
ASICs for such applications as 3-D graphics, digital video disk
(DVD), digital set-top boxes, portable PCs, and hard drives,
according to IC Insights' McClean.
For example, instead of using a discrete DRAM with a constricting
32-bit bus, S3's ViRGE/MX mobile accelerator features 2 Mbytes of
embedded DRAM, enabling a 128-bit internal bus, and 1.36-Gbyte/s
bandwidth running on an 83-MHz clock, he said.
The embedded-DRAM market may be larger than many realize. There has
been a spate of embedded-DRAM announcements by major players.
Toshiba Corp. estimates the 1997 embedded-DRAM ASIC market at just
under $1 billion, and forecasts that sales will reach $5 billion to
$6 billion by 2002.
But these estimates don't include application-specific standard
products that offer standard embedded-DRAM ICs for disk drive,
digital video, and other applications, McClean said.
Some vendors have announced embedded-DRAM ASICs, including Fujitsu
Ltd., Hitachi Ltd., LSI Logic Corp., NEC, Samsung, and Toshiba. An
early leader in the embedded-DRAM ASIC arena is Samsung.
However, some DRAM vendors have mixed feelings about embedded
applications.
Micron's Mailloux is not certain how much market share stand-alone
DRAMs will lose to the embedded segment.
NEC's Mulhern said that embedded DRAM is a segment searching for the
right applications. Embedded DRAM is expensive compared with a
two-chip discrete DRAM, discrete-logic implementation, he said.
However, for graphics-IC suppliers, such as S3, Silicon Magic, and
Trident Microsystems Inc., the higher bandwidth and space savings
from a single-chip solution using embedded DRAM outweigh the higher
cost, McClean said.
Moreover, Toshiba listed six benefits of embedded DRAMs: flexibility
in configuring the DRAM macrocell to match the application, more
bandwidth from wide and fast on-chip memory buses, lower access
times because on-chip access is always faster than going on and off
chip to a discrete DRAM, reduced circuit-board area because of fewer
external pins and traces, lower power consumption due to lower
capacitance with on-chip connections, and lower switching noise on
the data bus between the memory and logic.
Dataquest Inc., San Jose, concurred with some of Toshiba's
perceptions and added that embedded DRAM also enables lower chip
count. But Dataquest cited several reasons for not using the
technology: higher costs, difficulty in testing, difficulty in
processing, and limited sourcing.
Why the cost differential? Logic processes achieve high speed
through high-transistor gain and low-resistance interconnect;
conversely, DRAM processes compromise gain and interconnect
resistance to yield small capacitors with high capacitance and low
leakage. Combining the two processes drives up complexity and die
costs significantly.
Integrating embedded DRAM into logic chips is a significant trend
that could capture a large portion of portable applications and
low-end desktop PCs, said Dean McCarron, a principal at Mercury
Research, Scottsdale.
In stand-alone applications, the DRAM specialty memory market in the
near term probably will be dominated by RDRAMs, SGRAMs, and EDO
DRAMs, McCarron said. SGRAMs are moving along well, but EDO's days
are far from over, he added.
The migration of PCs into the sub-$1,000 arena affects specialty
memory dynamics. Budget PCs often use older memory architectures.
The next set of issues is how vendors will decide between DDR SGRAM
and Direct RDRAM, McCarron said. Direct RDRAMs may become cheap
because they are used in voluminous main-memory applications, he
said.
McCarron concluded that technical merits aren't dominating the
discussion right now - price is.
But McCarron hasn't run into a single controller vendor with a set
strategy to deal with the proliferation and migration of the various
specialty memory architectures.
-Bill Arnold is a freelance writer based in San Mateo, Calif.
Copyright (c) 1998 CMP Media Inc. |
