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To: Rob S. who wrote (23725)2/12/1998 12:31:00 AM
From: Scumbria  Read Replies (4) | Respond to of 33344
 
Rob,

Thanks for the info. You seem to have access to a lot of good information. A few other important questions are:

1. Does the C6+ pipeline have architectural performance improvements to correct some of the deficiencies in C6?

2. Has there been any improvement in floating point performance?

3. Do the new MMX+ instructions work?

4. Are they developing a 5/6-metal layer part, and if so what is the die size reduction?

5. Do they use local interconnects (metal 0) in the RAM cells?

6. Which (if any) Asian fabs are they bringing up the parts in?

Thanks,
Scumbria


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