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To: shane forbes who wrote (9801)2/15/1998 5:51:00 AM
From: shane forbes  Read Replies (4) | Respond to of 25814
 
And still more useful stuff from the LSI Logic web site:

Highlights points that it is those slackers in the EDA business that aren't doing their job(!)

(Feeling more and more comfortable that the problem LSI had in being not able to use all those zillion gates was this tool problem. Could this have been the main impediment to revenue growth? Being an LSI Bull now I'll assume, as I've harped on before, that at the very least, it was a major contributing factor. No point having ample capacity if there are no designs that'll make use of it.):


lsilogic.com

For several years, the pace of silicon-process technology has exceeded the capabilities of EDA tools, which has led to a so-called "design-productivity gap." System designers, for example, couldn't create eight-million gate ASICs because there were no EDA tools available to handle these huge designs.

this solution gives engineers tools that allow them to design multi-million gate chips

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