Hey Jake's Mom - glad to see you are still hanging around here. In your honor (anyone who has recently posted would have gotten this honor) I have a reprint of a response I gave to a private correspondence for your personal viewing pleasure.
This is a reprint of a private response I just sent out. I have interjected some comments between your statements. I have also taken the liberty to reprint this response on Stock Swap. I hope you are not offended. After spending the time on your response, I thought it was only right that it go out to wider readership.
It Ain't Asia.
Re: "If you were an Asian semiconductor supplier, the last thing you
would do is skimp on capital spending-they have to invest in equipment," asserts analyst David Wu at ABN-AMRO. Wu adds that the company is continuing to gain market share. "Once people quit bellyaching about Asia," he says, the stock could rebound to $50 within a year-a 57% gain." Message 3434319;
CORRECT-in order to remain competitive you have to advance with the technology and keep your equipment set current. If you switch from DRAMs to logic or ASICS you have to deal with a more complex backend of the wafer process in the form of interlevel dielectrics and metallization. This means more AMAT and NVLS type tools in the form of etchers, CMP, and CVD equipment. Falling behind the technology curve can be the fastest way to find yourself out of the marketplace. Unless everyone stops dead in their tracks you have to "keep up with the Joneses" in both technology and in cost effectiveness.
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1 - The problem is not Asia. If it were then, David Wu, would make a good point in his most recent "statement" (posted by Henry).
2 - The problem is worldwide overcapacity of semiconductor fabs. Yes,
part of Asia's problem was that they were losing money on chips. Why
were they losing money on chips? IMO, because there was and still is
too much capacity. This is the Supply/Demand thing, Econ 101.
There is unused capacity but it is their own faults. All of the Pacific Rim countries involved in DRAM manufacturing have been trying to put one another out of business. The USA used to own the DRAM business and now Micron Technology is the lone participant in this market. The Japanese went after this business, along with EPROMS and SRAMS with a vengeance to dominate the market. Low costs, price dumping, Gov't backed ridiculously low loans, import tariffs, etal., all contributed to their being able to push us out of the market. Then in steps the Koreans, who built a DRAM empire overnight (look at Samsung and Hyundai) to take on the Japanese and knock them out of the DRAM business. Of course everyone realized the need for memory was going to expand but this expansion was not handled well. First, by going from 150mm to 200mm diameter wafers you increased capacity by 1.8 times, roughly. When you couple this with a die shrink from 0.75u to 0.50u to 0.35u to even the new 0.25u, you get another multiple increase in the available devices manufactured per wafer processed. If this were not enough, you go from a 1 Meg to a 4 Meg to a 16 Meg DRAM to now the 64 Meg DRAM. The increased density of memory is going at a geometric rate and not an arithmetic rate. Remember the days when 8 Meg of memory were 72 DRAM chips on 8 SIMM modules of 9 chips per module? You had to fill up each of 2 banks, consisting of 4 slots each to reach 8 Meg. In comes MSFT with Win95 needing at least 16 Meg to operate correctly, maybe 24 Meg to be safe. Well, the 4 Meg DRAM modules needed only 1 bank of SIMMS * 4 modules * 9 chips for only 36 chips for 2x the combined memory of the 8 Meg scenario.
From this point in time, you move forward to the non parity situation (it existed before but was not dominant) that reduces the 36 chips down to 32. Subsequently we started to call these things EDO DRAM. Now along the way, the older 1 Meg SIMM modules were being made except it wasn't with 8 or 9 chips. The 1 Meg chip production was shutdown or converted to 4 Meg production. The 1 Meg SIMM modules started to shift to 3 chip modules consisting of 1 - 1Meg and 2 - 4Meg chips. Great idea on the part of the manufacturers. You service both markets with your 4 Meg chips and have a great ramp down strategy of the 1 Meg modules.
Next we move to the switch from 4 slots per bank (requiring SIMMs to be added in groups of 4) to the 2 slot and 1 slot banks of SIMMs. The combo motherboards that had both the 32 and 70 pin slots allowed the use of the older SIMM modules. After all, you could add to the already existing 4 or 16 Meg that was on board instead of having to replace all modules like you did before. (yes, in the 8 SIMM slot case you could have kept 4- 1Megs, thrown away 4 - 1Megs and upgraded to 4 - 4 Megs for a grand total of 20 Meg memory). These new bigger modules that come 1 or 2 to a bank, come in the 4,8,16 and now 32 Meg varieties and are almost exclusively non parity type consisting of 8 chips. The new motherboards only have the longer 70 pin modules and need at most 2 SIMM modules of 8 chips per module, totally only 16 chips to attain16, 32, or 64 Meg of available memory.
From 72 chips on a 150mm wafer to 16 chips on a 200mm wafer (almost twice the area) to generate 8 Meg of memory vs the new 32 to 64 Meg. So we are we now??? 2-4 years worth of heavy and costly DRAM expansion. In terms of wafer fabs coupled with shrinking die sizes, increasing wafer sizes and improved die yields per wafer processed. That is the key that few seem to comprehend. It is not really the number of die but the number of wafers manufactured. All the equipment used on the industry are based on wafers processed per hour and not bounded by the size of the wafer (exception is steppers). Everything here is cost efficiencies taken to the extreme. More wafer fab capacity, more die per wafer processed (improved yield or smaller die), larger wafers, and higher functionality per die processed. This is an expotential factor on one side of the equation while the other side is less devices needed to achieve the desired end memory capacity results. All this combined together with a cutthroat business to drive each competitor out of business has created this mess. The USA is no longer a force in the DRAM business. You can also see that some of the us majors that had affiliations with the Pacific Rim in the DRAM arena are backing out. Latest casualty is TXN.
Too many DRAM wars and too much subsidizing of the sector coupled with the games played to create demand or starve the supply chain to raise prices has caused this problem. Very little forward looking planning for the future. Now that certain parts of the business have caved in, we are starting to see the corrective actions. They are controlled restraint, temporary capital freezes, re-organization of business units, and a shift away from a totally DRAM dependent manufacturing strategy. The excess capacity can be re-configured to other necessary product families like analog and logic functions for the wireless communications revolution now getting underway. This will required modification of the existing equipment set of which AMAT, NVLS and a few others will benefit.
Bottom line: there was an is an over capacity in the DRAM arena created by Asian entities hell bent on making DRAMs their vehicle to become a strong economic force globally. They brought this one themselves. There are capacity issues at certain companies that make devices that are far from this commodity level. The rest of the world has focused on device technology at the expense of high volume manufacturing of commodity products. The Asian companies have tried to master the art of high volume manufacturing but have very little device intellectual property beyond the few devices they make. The foundries of Asia would shutdown completely if someone did not need extra manufacturing capacity to meet customer demands or if the design entities in the USA without fabs were able to cost effectively have us based IC houses to make their wafers for them.
3 - On the latest CC, James Morgan even stated that orders from Taiwan will be down for the next quarter (or two) while they digest all the new equipment they have recently purchased. Taiwan is NOT having any debt crisis; they are financially very sound.
True but Morgan also stated that they are looking to shift some manufacturing capacity to logic type devices which may cause a need for some additional equipment. Their problem is that they are a foundry to the world and have to keep at parity with the most advanced technology in order to meet potential customer needs. Foundry services have not met their plan since the 0.35u foundry business has not taken off. This was going to be a higher margin business to finance the 0.25u and below business needs. They are still seeing more 0.50u business and believe the 0.35u products have been slow in being introduced and implemented by the end user.
4 - Recall the "Prudent Bear Fund" approximately 9 months ago came out in Worth magazine as saying he was short AMAT because they were
"experiencing declining orders". We (all loyal AMATers) went ballistic because he was just wrong with his basic assumption of "AMAT is experiencing declining orders". However, now we clearly ARE experiencing declining orders and if moving from .35 to .25 actually does increase INTC's output of chips by 4 times, then I think AMAT will be in this "declining order" position for a good while (9 months at least).
0.35u to 0.25u is a 30% shrink in die size. This will not lead to a 4x output increase but rather a 33% increase at best (an extras 10% just for the shrink). In order to get a 4x increase in output, the microprocessor must be close to 1/4 the size(area) of the present chip or you must have included a 2x increase in wafer area.
5 - I get the "Semiconductor International" magazine in the mail right now and in the Jan 98 issue (I believe this is the right issue), there is an article written by an Intel engineer and he states that 300mm is only a "make or break" issue for DRAM makers. They are the ones who could really benefit from the transition because they operate in such HUGE quantities. The article also states that for 300mm to be
economically feasible the tool sets can only cost 30% more than the
200mm tools and use no more precious floor space than 200mm. My point
and question in this diatribe is that it seems to me that 300mm will
not be a big force/issue in this market until around the year 2001 (at
the earliest). Meaning we could have a real lull in late 98 and 99.
Yet the analysts projections are showing decent '99 numbers. Do you
guess they have any idea or are they just tacking on 15-20% growth
(their normal extrapolation thing).
Today we should expect close to 80,000 300mm wafers shipped in this year, rising to just under 10 million wafers in 2002. So your comment is correct. We also see pushouts of the 300mm implementation by some companies because the tools are not ready yet or fully qualified and it may not be a good idea. Common sense may finally be coming back to the "advanced rangers" of the industry. It could be potentially suicidal for a company to debug a 0.25u technology while debugging a new generation of process tools, while fighting the "gotchas" of shifting to 300mm and DUV lithography. This is way to many variables to contend with at the same device implementation level. Cooler and calmer heads are looking at the mature 200mm toolset as the vehicle to enter in the DUV and 0.25u and below technologies first. After that, do the 300mm and new toolset debug.
The floorspace requirement is not necessarily accurate but is desired. The key is to produce the same amount of wafers square foot of floorspace. However, the move to 300mm is more than doubling the area of the wafer and good die per wafer processed so slight floorspace concessions would be well worth it. The cost for a bare silicon wafer might be 4x (300mm vs 200mm) by 2002 which should be considered. The cost of the 300mm toolset needs to be cost effective relative to COO(cost of ownership) and not necessarily the same price as the 200mm set. The industry measures itself on wafer cost, die cost, and margins. If you have a tool that has twice the throughput at twice the price you may have a wash. However, if all the equipment can be replaced in your fab for twice the throughput and twice the price, it might be a smart thing to do since depreciation of the new equipment is only one component of wafer cost. In this scenario, the same number of people could be used to produce twice as many wafers and twice as many yielding die. The same number of support staff could be used. There would be cost efficencies for both direct and indirect materials and labor. Finally, there are fixed costs that are independent of wafer outs. All these factors do not support one of your comments above. 300mm toolset could be more costly and take up more room if they reduce the overall cost per square centimeter of wafers processed.
Now, to offset this, the established mature process and wafer size may have already been fully depreciated and become a cash cow for the company. It does not make sense to increase your debt structure if you have a cash cow. You could afford to wait to shift after you bank the money needed to expand or build by utilizing the cash cow and foundry services until the new expansion makes real good sense.
300mm wafer processing only makes sense to the real high volume producers of devices at this juncture. Once the entire toolset is defined and we see how much of the processing is batch processing and individual wafer processing, we can better determine the cost efficiencies of implementing 300mm manufacturing for low volume-high mix types of products. If I were to build a fab today, I would still build it at 200mm.
6 - In the above where I state "the problem is not Asia" I am trying to say the PRIMARY problem is not Asia. Of course, Asia is a small problem right now. I am saying that it may be masking an even larger problem, that being a world-wide overcapacity of fabs.
Over capacity of DRAM and commodity type capacity. There is more and more silicon content added to our lives each day. There is a need to manufacture this stuff. A great deal of it cannot be made in the high capacity commodity type fabs until they learn how to do it. Keywords is learn how to do it, not if they can do it. I have worked both sides of the fence and speak from experience.
Please forgive the hopping around. Thanks for your comments on these very random thoughts.
PS. I am not an engineer and most of what I "know" about these stocks (which I study A LOT) I learn from reading, so I have no first hand knowledge, and will greatly appreciate it if you inform me where I am on target and where I'm missing the boat.
Lastly, my real problem right now is the valuations of AMAT, KLAC and NVLS. In my opinion, they are NOT valued like we are entering a downturn (have entered one). Unlike BRKS, which I bought the other week at 14.50, which is about $1.25 above Book Value. AMAT is trading at 3.3 times sales!! That seems unrealistic for this point in the cycle. However, to try to ensure that I don't miss the boat, I plan to start buying AMAT at 30 and buy more and more if it goes south from there. I'm having trouble making sense of this market. The LRCX announcement almost did nothing to the stock?!
AMAT, KLAC, and NVLS are the best of the best in this sector. You could call them the big 3 of the industry if you so chose. I could add a few more but what you wind up with is a list similar to DELL, CPQ, INTC, MSFT, etal. They are in a class by themselves and should not be compared to the likes of the 2nd and 3rd tier companies. Like the group i highlighted for you (CPQ, DELL, MSFT, INTC), your 3 may decline in value but over time they are on a never ending ascending price valuation. To play the roller coaster ride on these stocks will be very boring, cause a great deal of capital gains taxes to be paid, and a few run ups will be missed. These are keeper stocks like DELL, INTC and MSFT. I also was slightly confused that LRCX held up as well as it did, given the nature and tone of the conference call.
Andrew |
