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To: Kevin K. Spurway who wrote (4555)	2/22/1998 5:30:00 PM
From: Paul Engel	Read Replies (1) \| Respond to of 6843

Kevin - Re: "PowerPC 750 on the same IBM process (.25u, 5 metal layer) has 6.35 million transistors and a die size of 67mm^2, whereas the K6 has 8.8 million transistors and a die size of 68mm^2" Thanks for that data - as you note, it suggests something may be wrong with AMD's design rules - especially since IBM created the process and has much more experience with it. Re: " How unprecedented would such a re-layout be?" It would be quite unusual. Intel generally goes the opposite way. They negotiate (between Technology Development and Design and "Marketing") what the design rules are - to insure high performance AND high yield - not necessarily minimum die size. Quite often the circuits are bigger than the external world would believe - especially when compared to small die from AMD and IDT. Once a process and product get up to a given yield level (low defect density) Intel puts a new design team onto the product for "Compaction purposes". The die is re-laid out with space saving circuits and tweaked lay out, and perhaps different design rules that fab production people have agreed to accept in order to reduce further the die size. Paul