To: toccodolce who wrote (1557 ) 12/9/2025 11:21:57 AM From: toccodolce 1 RecommendationRecommended By
Read Replies (1) | Respond to Latest from RDDT 1. How big of a step up is this? Short answer: meaningful architecture-level advancement , not a small incremental upgrade. The key step-up is manufacturability at 1.6T , not raw optical performance.Why this matters: packaging complexity, EML shortages, yield, thermal density, and alignment cost .What’s new / important here: Hybrid integration of 4× 200G EML arrays on a single interposer No one else has shown multi-lane EML arrays bonded onto a passive platform with built-in MUX in a wafer-level flow. Competitors rely on manual active-alignment + micro-optics. No wire-bonds at 100+ GHz signals Industry wires up 1.6T engines using long RF paths ? more crosstalk, lower yield, higher power. POET’s flip-chip RF layout is materially better for 100–150 GHz era optics. EML capacity improvement EML shortages are real. POET aggregates four EML arrays effectively, reducing required individual chip count and making better use of scarce InP. Wafer-scale, passive assembly of a full 1.6T PIC Today the competitors assemble engines piece by piece (slow, expensive). POET is pushing “optical semiconductorization” — the first real demonstration of a mass-production-ready 1.6T engine. Bottom line: faster manufacturing of high-speed optics , which is the actual industry bottleneck.2. Where is the rest of the industry right now? Where POET sits: The industry is nowhere close to wafer-scale 1.6T hybrid EML engines with built-in AWG MUX.POET is ahead in one very specific area: High-volume manufacturable 1.6T optical engines. packaging, integration, yield, and scalable assembly , which actually determines who ships volume.3. Is POET ahead of competitors? Yes, in packaging architecture for 1.6T FR4. EML arrays integrated AWG MUX flip-chip drivers passive alignment only no lenses no wirebonds <0.5 dB coupling loss unique in the market right now .What competitors do better: Coherent and Lumentum have stronger raw photonic device performance (best-in-class EMLs). Broadcom and Nvidia dominate DSP and link-level architectures . What POET does better: Manufacturing architecture Cost, yield, scalability Compact RF layout Ability to mass-produce engines cheaply manufacturability is more important than bleeding-edge photonics speeds .4. Is the market ready for this product NOW? Yes. 800G ramps 2024–2025 1.6T starts sampling in 2025 1.6T volume begins 2026–2027 Nvidia’s GB200 requires enormous bandwidth; next-gen architectures require 1.6T pluggables and 1.6T LPO. tendering 1.6T transceivers evaluating engines selecting manufacturing ecosystems preparing for 1.6T testbeds The biggest bottleneck for hyperscalers today: They cannot manufacture enough 1.6T modules cheaply. 5. Realistic assessment of competitive advantage POET is NOT: The only way to build a 1.6T transmitter. Guaranteed to win sockets. Technologically superior in every photonics dimension. POET IS: The only company showing mass-producible hybrid 1.6T architecture . Offering the lowest-complexity, highest-yield 1.6T manufacturing path. Directly aligned with hyperscaler cost and volume requirements. 6. Summary (hard, direct) How big is the step-up? Large. It shifts 1.6T from lab prototypes to manufacturable engines . How much better than competitors? Better in packaging, cost, yield, EML scaling, and simplicity . Competitors still lead in raw device performance. Is POET ahead? Yes, in the part of the stack that matters for volume and cost. Is the market ready for it? Yes. Hyperscalers are preparing 1.6T ramps now and need manufacturable solutions. Commercial significance: If POET wins even a single major 1.6T design-in , it becomes a multi-billion-dollar business, because hyperscalers will buy millions of 1.6T engines per year.
