To: Andrew Vance who wrote (876 ) 3/11/1998 3:07:00 AM From: Artslaw Read Replies (2) | Respond to of 1305
Andrew, I think you and Crossy have strayed a little bit in your analysis of ISON. Their press release only states that the resulting material has better thermal properties. The implication is that the material will be better able to dissipate heat, and will thus allow improved circuit density. I don't know how much improvement in thermal conductivity could be expected (note that the company "expects" an improvement; they haven't shown anything). Heck, there might be some tiny improvement in mobility as well, but I digress. . .They never state that the wafer has no impurities--their assertion is "isotropically pure" meaning only one isotope of Si is present. No one can make a wafer without impurities, period. The wording is imprecise I suppose, but few press releases are more than skin deep. . . Since I have benefited from your knowledge in the past, I thought I might endeavor to comment on some of your comments:First, silicon wafers are made "pure". They have a seed crystal from which the ingot is formed and then the wafers sliced. I beleive FERO is a supplier of these crystal seeds. FERO makes the pullers, of course, but do they really make the seeds?2. The wafers have a specific crystal orientation for use in certain applications. This gets to be very complicated and goes back to your math courses dealing with the intersection of 3 planes. These orientations need to be tightly controlled, especially for future MEMS production. However, the crystal orientation plays a role in IC functionality. Since I was very much involved with the reliability of MOS transistors in college, I feel compelled to elaborate on your statement. :) The standard crystal orientation for MOS circuits (i.e. all DRAM, microprocessors, flash, ASIC, just about everything) is (1 0 0) {essentially any plane parallel to the face of interpenatrating face-centered cubes, i.e. diamond lattice, but now I've gone too far}. This is very important for ICs, as it is the orientation which has the lowest defect density (interface traps) along the surface where the electrons flow. For MEMS, other orientations are used which provide better mechanical properties, etc. 6. It is the impurities that we induce into the silicon through all the IC manufacturing processes that gives the devices their electrical perfomance characteristics. Of course you are correct here, but again, these guys are talking about improving the heat sink abilities of the substrate (SOI is an excellent counter example--one of it's problems is poor thermal properties). ISON isn't suggesting anyone use pure silicon. The doping (intentional impurity) concentration in the channel of a MOS transistor is around 1E17 cm^3, whereas the density of Si atoms is on the order of 1E23 cm^3. That means there are still a million happy (due to their isotropic purity, no doubt) Si atoms for every impurity, and that is only near the active part of the device--much less elsewhere. Thus, if there really IS some crystallographic advantage to this approach, the doping will not adversely affect it. Anyway, to make a long message longer, my take on their release is simply that they figured out a way to make Si wafers using only one isotope of Si. They think this will improve some thermal properties of the underlying Si substrate, allowing improved circuit density. I personally wouldn't bet the farm on this, as even if it is true, it might not be cost effective. Anyone else have a slant on this? Sorry for the ramble (I took a lot out!) Steve