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To: DiViT who wrote (30774)3/11/1998 4:11:00 PM
From: ViperChick Secret Agent 006.9  Read Replies (1) | Respond to of 50808
 
Welll MC I LLH has a different set of TA parameters than you that he is looking at I guess.......(ooops I see you edited your post and the TA came from someone else or something)

since he needed a close over 20 (albeit more volume, I suppose)

however, I will take a headfake....in fact that is what I want...so bring on 22.5 on light volume please...



To: DiViT who wrote (30774)3/11/1998 4:24:00 PM
From: BillyG  Read Replies (1) | Respond to of 50808
 
Startup company promises a silicon compiler for embedded DRAM designs. The company has former Chromatics and LSI Logic engineers........

Posted: 3:00 p.m. EST, 3/11/98

Startup promises embedded DRAM compiler

By Richard Goering

SAN JOSE, Calif. - Taking aim at a major bottleneck for
systems-on-silicon designs, a new provider of intellectual property (IP)
promises to deliver a compiler later this year that can generate embedded
DRAM for 0.25-micron and finer process technologies. If successful,
Silicon Access Inc. will revolutionize what is today a painstaking,
handcrafted process.

And embedded DRAM is not the only focus for the company, which will
also offer SRAM, ROM, an I/O library and a standard-cell library. But
embedded DRAM is clearly its most ambitious goal, given that DRAM
today varies greatly between processes and designs, and must be
hand-tuned to get acceptable performance and density.

On-chip DRAM is becoming increasingly attractive for low-power,
high-speed applications in such areas as wireless telecommunications,
graphics and portable computing. The market-research firm Dataquest Inc.
predicts that the embedded DRAM market will soar from roughly $460
million in 1998 to $7.75 billion in 2001.

"In our view, there is a spectrum of applications for which embedded
DRAM is an absolute necessity," said Perry Constantine, president and
chief executive officer of Silicon Access Inc. (San Jose, Calif.). "You
cannot have system-level integration without taking DRAM and putting it
on-chip."

But that's not an easy process, he said. "Today, there are perhaps 100
expert DRAM designers in all of North America," Constantine said. "To
do a proprietary architecture takes four to six months. We propose to
develop a DRAM compiler that generates application-specific
architectures within hours."

What's more, Constantine said, there will be no sacrifice in logic
performance or in DRAM yield and density. In fact, he said, Silicon
Access has developed a proprietary DRAM architecture that is "at least 50
percent faster" than any existing architecture. "It's more granular than what
exists in the marketplace," he said, "and it won't waste any chip size or
area."

The company's goals are quite a bit broader than the embedded DRAM
compiler, due in the fourth quarter of 1998. "We want to be the largest
provider of silicon-proven IP," said Constantine. The company has chosen
to focus most of its initial efforts on memory, but is also offering a
standard-cell library that's available today.

In addition to compilers, memory instances and libraries, Silicon Access
will offer an extensive range of services, including cell development,
memory-instance generation, design-flow support and physical layout. The
company will sell to foundries, fabless semiconductor vendors and systems
houses who do their own IC layout.

While the company's goals are ambitious, Silicon Access appears to have
amassed a lot of ASIC, EDA and silicon expertise. Constantine was chief
executive officer of LSI Logic Canada
and executive vice president at
Aspec Technology.

Michael Beunder, director of technology, was director of technology
development at Compass. Greg Hackney, director of software
development, was director of library development at Compass. Hing
Wong, director of memory development, served with Chromatic Research

and IBM, and has authored many publications on DRAM design.

The 20-person company is backed by venture capital from Norwest
Ventures, and is heading for another round of financing in 60 days.
Constantine declined to say how much money was raised.

Constantine revealed few details about the technology Silicon Access is
developing. DRAM and logic require different processes, but he said the
company will offer a true DRAM process embedded on top of a true logic
process.

The compiler will produce single-transistor-cell DRAM blocks with up to
64 Mbits, Constantine said. It will provide logic models for synthesis,
simulation and static timing analysis, as well as GDSII files for layout. The
compiler could be licensed to customers or run by Silicon Access as a
service. It will be tailored to the customer's process as part of the licensing
relationship.

Constantine said Silicon Access is working with two foundries that have
DRAM capability, but he declined to name them. In any event, the
company promises "silicon-proven" IP, meaning that Silicon Access will
run test chips and characterize them.

In addition to compilers, Silicon Access will provide instances of
embedded DRAM, SRAM and ROM. These will be available in the
second quarter. An I/O library, including hard cores for such functions as
AGP, PCI and USB, is also slated for the second quarter.

A standard-cell library with more than 500 cells is available now,
supporting TSMC and UMC 0.25-micron processes. Tom Kozas, Silicon
Access director of marketing, said the library offers high density, a good
variety of drive strengths for synthesis, and porosity for place and route
tools.

The company has decided to focus all its products at technologies of 0.25
micron and below, Constantine said.

By working closely with pure foundries, and with customers who have their
own layout tools, Silicon Access helps customers bypass the traditional
ASIC business model. But Constantine said that ASIC companies will
continue to find customers, and he said Silicon Access will sell to ASIC
providers as they look for more intellectual property from external sources.