Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : COMS & the Ghost of USRX w/ other STUFF -- Ignore unavailable to you. Want to Upgrade?

To: Scrapps who wrote (13692)	3/11/1998 11:11:00 PM
From: Moonray	Respond to of 22053

Industry's First 4Meg Zero Bus Turnaround SRAM Introduced by Motorola - Wednesday March 11, 5:40 pm Eastern Time 100 Percent Bandwidth Dramatically Improves System Throughput AUSTIN, Texas--(BUSINESS WIRE)--March 11, 1998--A new 4Meg static random access memory which for the first time allows systems to process data on every clock cycle, was announced today by Motorola. Called a Zero Bus Turnaround(TM) (ZBT) SRAM, the new memory eliminates dead cycles and permits 100% use of system bus cycles. This dramatically improves the throughput of communications and networking systems. The new device extends the normal bandwidth of a standard pipelined SRAM by allowing reads and writes in any order on each clock cycle. This eliminates dead cycles, thus delivering 100% use of bandwidth. biz.yahoo.com o~~~ O