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To: HerbVic who wrote (3315)3/21/1998 6:01:00 PM
From: Sam P.  Read Replies (1) | Respond to of 93625
 
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PC Strategy: MemoryÿYour Future PC
ÿIntro ÿProcessors: ÿÿInside Intel ÿÿThe Chip Clones ÿÿThe Socket Memory
ÿBus
With all the advances in microprocessors, it's easy to forget that
memory is as important to overall system performance as any other
component. As a matter of fact, it may be the most important component
of all. Nothing can shackle a fast CPU faster than a poor memory
subsystem. Despite this fact, memory technologies have not advanced
nearly as rapidly as microprocessors.

During the course of the PC's development, overall memory performance
has merely doubled, while CPU performance has increased by a factor of
100. The PC era has also witnessed six generations of processor
families--8086, 286, 386, 486, P5 (Pentium), and P6 (Pentium Pro and
Pentium II). But the family tree of DRAM technology for the same period
is less expansive--Fast Page Mode, EDO, and Synchronous DRAM.

Cache Advance
To compensate for the memory-performance deficit, developers have used
cache memory on the CPU itself (Level 1) and in the system (Level 2).
Thus, every Intel CPU since the 486 has had a small amount of L1 cache
built right into the chip. For example, the 486 had 8K, the Pentium and
Pentium Pro have 16K, and the Pentium/MMX and Pentium II all have 32K of
L1 cache.

The amount of Level 2 cache in systems has increased as well, from 32K
to 64K in the era of the 386 and 486 to 512K in today's typical systems.
In fact, it's not unusual to see caches of 1MB or greater in high-end
servers and workstations.

Having cache memory on the processor and in the system compensates for
the performance limitations of the slower DRAM. Though the quantity of
cache memory is small, it's of a type (SRAM, or Static RAM) that is
inherently faster than even the fastest DRAM, partly because SRAM
doesn't need a refresh cycle. (A refresh cycle is the time it takes to
electrically charge memory to avoid data loss; during this cycle, data
can't be accessed from memory.)

Although the use of cache memory has bought the computer industry some
time, putting memory on CPUs and using SRAM is expensive, and you can
only use so much. Ultimately, the DRAM used for system memory needs to
get significantly faster.

Most systems today use synchronous dynamic RAM (SDRAM). The main
difference between SDRAM and its predecessors is that it is synchronized
with the system clock (the same one that governs the speed of the
processor). This helps reduce the time it takes to retrieve data from
memory by eliminating wait states (which occur when the processor is
ready for data but the memory hasn't yet supplied it).

The good news is that improvements in system memory are just around the
corner. Soon, you will witness two rounds of change--one around the
middle of this year and another about 12 months after that.

One improvement that's already occurred is the move from SIMMs (Single
In-Line Memory Modules) to DIMMs (Dual In-Line Memory Modules). Most
machines shipping today use DIMMs exclusively, though a few motherboards
are designed to let you mix and match the two. The main difference
between the two types of modules is that SIMMs are 32 bits wide, so a
pair is required to interface with a 64-bit processor like the Pentium
Pro or Pentium II. DIMMs are 64 bits wide, so you can add them to a
system one at a time.

Because 66 MHz is the fastest bus speed typically used to transfer data
between system memory and the CPU, virtually every major chip set
supports 66-MHz SDRAM. (The type of memory a system supports is a
function of the memory controller, which is one of the features of the
chip set.) All current Intel processors and most of their competitors'
products have 66-MHz bus speeds.
The Price of Progress
In the future, improving system performance by adding RAM could be much
more difficult than it is today. Over the last few years, during the
transitions from Fast Page Mode DRAM to EDO, and then from EDO to
today's version of SDRAM, it was possible for a system to support more
than one type of RAM. This was a boon to users, because it offered
flexibility. Putting in the newest type of memory always brought better
performance, and if you had older memory lying around, chances are you
could use it, too (if your system came with 16MB of SDRAM, but you had a
spare 48MB of EDO, for example).

That flexibility, unfortunately, is coming to an end. The 100-MHz SDRAM
interface, although physically similar, is electrically different from
current DIMMs. Therefore, SDRAM designed for 100-MHz systems won't work
in 66-MHz machines, and vice versa. The same is true for the Rambus
interface--Rambus memory modules (a.k.a. RIMMs) will not be
backward-compatible with earlier systems.

How will this impact you? Well from now on you'll have to pay much
closer attention to the type of memory you buy, because you'll have to
live with your choice for years to come. Compatibility won't be a given.

Speeding the Bus
As you've read in the section on processors, most CPU architectures will
be transitioning to 100 MHz this year. This will necessitate a jump to
100-MHz SDRAM. As you might imagine, older 66-MHz SDRAM will be
incapable of running at the higher speed, adding yet one more variable
to consider when buying memory upgrade modules (see the sidebar "The
Price of Progress," earlier in this section).

The move to 100-MHz SDRAM will probably be short-lived, though. That's
because even 100-MHz SDRAM, which can move about 100 MBps, won't be able
to provide enough bandwidth to satiate the voracious appetite of the new
generation of processors.

That's why various new memory architectures are under development. One
is SDRAM-DDR (the suffix stands for double data rate). As the name
implies, SDRAM-DDR doubles the available bandwidth to 200 MBps. It does
this by employing more advanced synchronization and signaling
techniques. The SDRAM-DDR design is being championed by JEDEC (Joint
Electronic Device Engineering Council), an industry group made up of
most major memory manufacturers.

Another industry consortium is proposing a different memory design,
called SyncLink. It extends the SDRAM design to quadruple available
bandwidth to 400 MBps.
Graphics Memory Moves onto the Chip
As we've noted, memory performance has not kept pace with processor
technology, which often leaves the latter idling. One way to increase
memory bandwidth is simply to add more of it--going from a 64- to a
128-bit data path, for example. The problem is this method increases
both the cost and complexity of the processor and the amount of memory
you have to use. One way to solve this problem is to use a narrower, but
much faster, interface between the two, as Rambus has done.

But what if you could combine processor and memory? There are already
some examples of this concept at work, the most notable of which is the
MagicGraph line of mobile graphics controllers from NeoMagic. MagicGraph
chips have found their way into a substantial number of notebooks,
including models from Dell and Quantex. It's no wonder why: With a 2D/3D
graphics accelerator and 1.2MB of display memory integrated on the same
piece of silicon and connected by a 128-bit interface, the chip offers
greater performance than most conventional solutions. It also takes up
less space and consumes far less power.

The drawback is that you can only fit so much memory on an integrated
device--although the amount is growing (the MagicGraph used to contain a
mere 768K)--so when you need a lot of memory, external RAM chips are
still the way to go.

Power consumption, space, and cost are not as much of a concern on
desktops. But in devices where those factors count, such as portables,
you can expect to see more integration in the future.

The 800-MHz Bus
Notwithstanding these developments, it appears certain that the type of
memory that will replace 100-MHz SDRAM in PC systems will be Direct
RDRAM. This shift will occur in mid-to-late 1999.

RDRAM memory is not new, though. Designed by Rambus, it's currently used
in devices ranging from video games and graphics cards to workstations
and Ethernet switches. Direct RDRAM is an enhancement of the original
RDRAM specification developed by Rambus and Intel for use as PC main
memory.

Why is Direct RDRAM the heir apparent to 100-MHz SDRAM? First, it's the
one Intel has chosen. And given the company's increasing dominance as
the manufacturer of the building blocks of the PC platform, Intel can
certainly influence the type of memory the industry will use going
forward. But practically speaking, Intel's support is almost incidental,
because Direct RDRAM appears to be the only architecture that can
provide the performance necessary for the next generation of processors.
Equally important, it offers enough headroom to support several more
years of processor innovation. Here's how.

Direct RDRAM uses a relatively narrow interface, only 8 bits wide,
called the Rambus Channel. However, the interface runs at the extremely
high clock frequency of 800 MHz. Direct RDRAM uses two of these
channels, yielding a whopping available bandwidth of 1.6 GBps. Adding
more channels can provide still more bandwidth.

So that the narrow Rambus memory can interface with the wide 64-bit data
path of PC processors, a new type of memory module is under
development--RIMM, or Rambus In-Line Memory Module.

RIMMs have the same physical dimensions as DIMMs, which means vendors
can more easily update motherboard design to support Direct RDRAM
memory. However, the two devices are not compatible, and vendors will
likely prevent users from interchanging the two (probably by means of a
notch key).

Intel says that the chip sets it will ship in 1999 will support Direct
RDRAM memory. What's not yet clear is whether the chip set will support
both RDRAM and SDRAM memory in the same system--which would let vendors
build systems that include one or the other type of memory. At press
time, Intel would not say. Our guess is that Intel's chip set won't
support both memory types, because it would make the chip sets too large
and too expensive.
BackContinued
------------------------------------------------------------------------
Joseph Moran is senior analyst at Windows Sources and author of the NT
Networking column. You can contact him at jmoran@zd.com. ÿÿ