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To: Kirk © who wrote (52020)4/4/1998 7:11:00 AM
From: Maxwell  Read Replies (3) | Respond to of 186894
 
Kirk:

<<I thought a good Intel yield on a mature process was 95% so I would think their definition of "Excellent" would be at or above this. True?>>

You are mistaken. CPU microprocessor is not easily manufacturable compared to DRAM. Even 64MB DRAM with latest process technology doesn't even yield 95%! Intel 0.35um PII has a die size of 203mm^2 and has about 115 dice on an 8" wafer. It is a 5 metal layer process. 60% is very good. Most of the defects do not come from the air in the clean room but from the machines when processing. Equipment such as etchers and PVD/CVD from AMAT, LRCX and Novellus generate defects as they are heavily utilized in manufacturing. Tracks spinning on resists and sinks used in stripping resists and cleaning also add in defects as they are continuously utilized. A clean machine is considered when it adds in less than 5 defects per layer on an 8" wafer. If it doesn't pass engineers will take them down and clean.

In the PII there are over 20 masking layers and hundreds of processing steps and are heavily backended process. If you add up all the defects seen at each processing layers a yield of 60% or so is very good. Engineers can improve sort yield by increasing scrap in line on wafers with high defects (reducing line yield) but that reduces the number of dice out. There is a cross over at some point.

I am only tell you the facts here and has been confirmed from my source. Paul Engel will probably blow that number by an order of magnitude. He will tell you that Intel achieves 90%+ on the PII. What he tells you is seen only a few wafers or lots seen out of thousands of wafers processed. If he say that Intel achieves 90%+ consistently on their PII then he is full of shit.

Maxwell