To: Ken Robbins who wrote (52707 ) 4/10/1998 8:02:00 PM From: MileHigh Read Replies (2) | Respond to of 186894
Thread, thought you might want to read this. I would appreciate any comments from the more technically inclined individuals as to how it might effect Intel and the rollout of PC-100 memory bus....Does not sound like good news, BWDIK <g> TIA, MileHigh ------------ Warning Alarm Sounds On Implications Of PC-100 Memory Bus (04/10/98; 2:04 p.m. EST) By Ron Wilson, EE Times <Picture>The extremely tight timing and impedance specifications required by the PC-100 memory bus will have profound effects on the infrastructure of the PC market, according to Paul Popadak, design engineering manager at Kingston Technology. Popadak said he predicts PC-100 will lead to a shakeout in the module industry, raise serious issues for memory expansion modules, and present a barrier to the adoption of double-data-rate (DDR) dynamic RAM (DRAM). The PC-100 specification, released by Intel, specifies the timing, placement, and routing of signals and components for memory modules that are to be used on a synchronous 100-MHz memory bus. PC-100 systems are expected to appear later this year, after Intel releases a system controller chip that is PC-100-compliant. Timing on the PC-100 bus is so extremely tight, Popadak said, that module makers have been forced to buy testers with resolution in the picosecond range to screen incoming synchronous DRAM devices. Parts from some vendors have already been found not to work. Items that were not critical in the past will now have to be watched closely, Popadak said. A slight misallignment of pc-board layers could cause unacceptable errors in trace impedance, he said. Such issues have caused some module vendors to use Gerber tapes from Intel to lay out their boards. Some module vendors will not make the necessary investment to comply with the stringent new requirements, Popadak said. Others are likely to try but fail, which would lead to a shakeout of module vendors. But the issues involve more than module makers. Motherboard designers and third-party suppliers of core logic, should any appear, must all be similarly careful. Everything from the system controller chip to the SDRAM devices must be tightly controlled, which has led Kingston and a few other module makers to design and test memory modules specifically for the motherboard designs of a particular original equipment manufacturer. Such designs are obviously not interchangeable. This presents a huge issue for the memory aftermarket, where add-in Dual In-line Memory Modules depend on interoperability. "I think it will be possible to design DIMMs that will work in most systems most of the time," Popadak said. "But it probably will prove impossible to design PC-100 DIMMs that will plug into any motherboard and work all the time." The tightening specs also raise a serious question for supporters of the DDR DRAM, Popadak said. Intel and Rambus have produced a detailed, line-by-line specification for the Direct Rambus memory interface that is just as comprehensive as the PC-100 spec. "It is very challenging, but at least we know what the target is," Popadak said. No such specification exists for DDR DRAM deviceds, however. And without it, system vendors may find it impossible to manufacture DDR-based systems using a variety of DRAM vendors, core-logic vendors, and motherboard designs. At 100 MHz, small differences in loading and timing would be even more critical to DDR than to ordinary DRAM devices. "DDR presents much more difficult issues in signaling and data transfer," Popadak said. "I believe there has to be some sort of governing body creating a comprehensive spec similar to the one we have for PC-100. Otherwise it is not clear that the industry can make DDR-producible." <Picture: TW>