Silicon Investor (SI) -- The First Internet Community

STOCKTALK

We've detected that you're using an ad content blocking browser plug-in or feature. Ads provide a critical source of revenue to the continued operation of Silicon Investor. We ask that you disable ad blocking while on Silicon Investor in the best interests of our community. If you are not using an ad blocker but are still receiving this message, make sure your browser's tracking protection is set to the 'standard' level.

Technology Stocks : LSI Corporation -- Ignore unavailable to you. Want to Upgrade?

To: shane forbes who wrote (12103)	5/3/1998 10:10:00 AM
From: getgo234	Read Replies (1) \| Respond to of 25814

Shane and others: Article appearing in FT dated May 1 pg 17. Eastman Kodak and INTC form partnership.Eastman Kodak and INTC announced a broad-ranging partnership intended to breathe life into the market for digital photography among consumers. The article initially discusses the companies finding a higher -quality and cheaper way for customers to put their pictures on to their home computers. Later in the article "The companies will also work on developing a high-resolution mass-market digital camera, which would bypass the need for traditional film and photofinishing altogether. The lack of affordable, high-quality cameras has been one of the main reasons why digital photography has failed to live up to early expectations. By working with INTC, Kodak would be able to launch a high resolution camera at a mass-market price far more quickly". I would certainly think that INTC must be intending to use its own chips on such a product. Is this overall a positive for LSI in that the digital camera market will become a mass market product sooner or is it terrible news in that INTC will be competing for the same market as LSI. Your comments are appreciated as always.

To: shane forbes who wrote (12103)	5/4/1998 9:41:00 AM
From: Grand Poobah	Read Replies (1) \| Respond to of 25814

Shane, LSI should be OK with masks for a while. Mask makers are concerned with the drawn gate length of a process, not the effective gate length. There didn't used to be much of a difference between the two, but now that we are getting to these smaller transistors, short-channel effects are becoming prominent, one of which is the difference between drawn and effective gate lengths. The drawn gate length is the physical dimension of the polysilicon gate as reproduced from the mask. The effective gate length is the effective electrical length of the channel, which is shortened by the depletion region from the drain p-n junction extending under the gate. The drawn gate length describes the gate as it is physically built (which is of interest to the mask maker), and the effective gate length describes the gate as it operates electrically (which is of interest to the designer and makes for better PR for the company since it is a smaller number). G.P.

To: shane forbes who wrote (12103)	5/4/1998 11:20:00 PM
From: Duane L. Olson	Respond to of 25814

Wiz, the difference between stated line widths and effective was once reasonably clear to me. Now I have to use little tricks like noting that current Pentium II production is done using .25u -- good for a reference point. One encouraging thing for LSI, at their newest plant, is that DPMI is co-located in the LSI facilities out at Gresham. And they are pre-installing a capability to provide masks down to .13u. They must really want to treat LSI well, with all the neat things they have coming in the next 1-5 years. (Most of which this thread has had pointed out to them by Your Majesty, the Wizard). If someone can come up with a good way to distinguish between stated design widths and effective widths for chips, BTW, we could all benefit... TSO