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To: Ed Sammons who wrote (6131)	5/13/1998 10:22:00 PM
From: Elmer	Read Replies (1) \| Respond to of 6843

<I was astounded by the quoted price differential of PII Xeon w/ 2MB cache (400MHz-$2700, 450MHz-$4500). Looks like server manufacturers will be well rewarded by making multi-CPU (400MHz-2MB or 450MHz-512KB) boxes and clusters as well as moving to less CPU intensive I/O architectures. > That is the idea. The very large L2 caches allow lots of processors to share a bus without too much bus traffic. Clusters would not be effective with caches less than 1 meg as the bus would saturate at around 4 processors. The 1 & 2 meg L2 versions would be of almost no added value on a desktop system, but I'm sure you realized this. rgs, EP

To: Ed Sammons who wrote (6131)	5/14/1998 1:03:00 AM
From: Yousef	Read Replies (1) \| Respond to of 6843

Ed, Re: "AMD seriously needs to release a 350MHz K6-3D on May 28. That will leave AMD 1 speed bin behind Intel for for 2 months ..." Ideally, AMD needs to relase the K6-3D at 400mhz ... You know last year on April 2nd, AMD was actually ahead of Intel in speed bins (at least on paper). Now, AMD is 3 speed bins behind and I don't look for AMD to be able to supply many 350mhz CPU's (if any). The reason being that AMD has an inferior IC process at .25um ... In fact, AMD's .25um process is closer to Intel's .35um process. Clearly based on the previous years performance, AMD is faller further behind in CPU speed (which is driven by frontend devices/drive currents). Make It So, Yousef