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To: Kenith Lee who wrote (6162)	5/15/1998 11:13:00 PM
From: Elmer	Read Replies (1) \| Respond to of 6843

<If you want a level playing field, why not disable Slot 1 and see which one runs faster on Socket 7.> PII is not compatable with the socket7 signals, voltage levels or bus protocol, and the same can be said of K6 on slot1. EP

To: Kenith Lee who wrote (6162)	5/16/1998 2:23:00 AM
From: Ali Chen	Read Replies (2) \| Respond to of 6843

Kenith, <If compeitors can reach the level of performance using older infarstures, Intel must have poor designs.> This is very true. The point is that AMD HAD TO PLAY the Socket7 field in order to gain acceptance and market penetration. Without the Socket7 infrastructure the K6 would be the same failure as the Nx586 was, with proprietary bus and no chipset support. Anyone can invent a new bus, and much better than the Intel ingenious Socket7. The real problem is how to convince IHV to play by your rules and against the 800-lbs gorilla. I hope the EV6 architecture will find it's way to the life since it is backed by CPQ/DEC/Samsung/AMD alliance. BTW, as per Kevin's suggestion, I run Winstone98 benchmarks on P-II and K6, with and without L2 cache. The result: P-II (at 200MHZ) drops from 18.1 to 14 (22.6%), while K6 drops from 18.0 to 15.0 (or 16.7%).